{"id":"https://openalex.org/W3083057417","doi":"https://doi.org/10.1109/mwscas48704.2020.9184698","title":"Dual-Purpose Metal Inter-layer Via Utilization in Monolithic Three-Dimensional (M3D) Integration","display_name":"Dual-Purpose Metal Inter-layer Via Utilization in Monolithic Three-Dimensional (M3D) Integration","publication_year":2020,"publication_date":"2020-08-01","ids":{"openalex":"https://openalex.org/W3083057417","doi":"https://doi.org/10.1109/mwscas48704.2020.9184698","mag":"3083057417"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas48704.2020.9184698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas48704.2020.9184698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079887499","display_name":"Madhava Sarma Vemuri","orcid":"https://orcid.org/0000-0002-8883-7790"},"institutions":[{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Madhava Sarma Vemuri","raw_affiliation_strings":["Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota","institution_ids":["https://openalex.org/I57328836"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076972812","display_name":"Umamaheswara Rao Tida","orcid":"https://orcid.org/0000-0002-9724-1585"},"institutions":[{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Umamaheswara Rao Tida","raw_affiliation_strings":["Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota","institution_ids":["https://openalex.org/I57328836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I57328836"],"apc_list":null,"apc_paid":null,"fwci":1.7891,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.83980041,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"424","last_page":"427"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.7312443256378174},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6612686514854431},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5227877497673035},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5027351379394531},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.49274685978889465},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.45087358355522156},{"id":"https://openalex.org/keywords/footprint","display_name":"Footprint","score":0.4195522665977478},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.41872501373291016},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4027203321456909},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3954296112060547},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36681076884269714},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3541686534881592},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23397493362426758},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12176096439361572},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07826316356658936}],"concepts":[{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.7312443256378174},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6612686514854431},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5227877497673035},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5027351379394531},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.49274685978889465},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.45087358355522156},{"id":"https://openalex.org/C132943942","wikidata":"https://www.wikidata.org/wiki/Q2562511","display_name":"Footprint","level":2,"score":0.4195522665977478},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.41872501373291016},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4027203321456909},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3954296112060547},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36681076884269714},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3541686534881592},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23397493362426758},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12176096439361572},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07826316356658936},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas48704.2020.9184698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas48704.2020.9184698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.75,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1972638602","https://openalex.org/W1976151090","https://openalex.org/W1999894889","https://openalex.org/W2091487568","https://openalex.org/W2093502879","https://openalex.org/W2129785295","https://openalex.org/W2510950183","https://openalex.org/W2579431025","https://openalex.org/W2775005974","https://openalex.org/W2899682193","https://openalex.org/W2905199518","https://openalex.org/W2954116083","https://openalex.org/W2976243136","https://openalex.org/W4237278439","https://openalex.org/W6757257926"],"related_works":["https://openalex.org/W2014709025","https://openalex.org/W2155019192","https://openalex.org/W3125341812","https://openalex.org/W1991674760","https://openalex.org/W1668171714","https://openalex.org/W2368534554","https://openalex.org/W2367891013","https://openalex.org/W2007108787","https://openalex.org/W2155297398","https://openalex.org/W4380607112"],"abstract_inverted_index":{"Monolithic":[0],"three-dimensional":[1],"integrated":[2],"circuit":[3],"(M3D-IC)":[4],"technology":[5],"can":[6],"potentially":[7],"improve":[8],"transistor":[9,79],"density,":[10],"performance":[11],"and":[12,60,77],"power":[13],"efficiency":[14],"for":[15],"future":[16],"IC":[17],"designs.":[18],"To":[19],"attain":[20],"maximum":[21],"benefits":[22],"of":[23,88,119,134],"M3D-IC":[24,137],"technology,":[25],"the":[26,43,86,105,120,130],"silicon":[27,116],"footprint":[28],"overhead":[29],"caused":[30],"by":[31,70,97,124,139],"metal":[32],"inter-layer":[33],"via":[34],"(MIV)":[35],"should":[36],"be":[37],"reduced":[38,123],"because":[39],"MIV":[40,51,54,72],"passes":[41],"through":[42],"silicon.":[44],"In":[45],"this":[46],"paper,":[47],"we":[48],"present":[49],"dual-purpose":[50,90],"utilization":[52,93,118],"where":[53],"serves":[55],"two":[56],"purposes:":[57],"1.":[58],"interconnect":[59],"2.":[61],"device":[62,92],"terminal.":[63],"The":[64,115],"active":[65],"devices":[66],"that":[67,104],"are":[68,80],"formed":[69],"using":[71],"such":[73],"as":[74],"MIV-based":[75,78,91,141],"capacitor":[76],"studied":[81],"in":[82,94,136],"detail.":[83],"We":[84],"demonstrate":[85],"advantage":[87],"these":[89],"on-chip":[95],"circuits":[96],"implementing":[98],"an":[99],"inverter.":[100],"Simulation":[101],"results":[102],"suggest":[103],"inverter":[106,121,135],"designed":[107],"with":[108,129],"our":[109],"approach":[110],"occupies":[111],"13844":[112],"nm2silicon":[113],"area.":[114],"area":[117],"is":[122],"up":[125],"to":[126],"24%":[127],"compared":[128],"conventional":[131],"transistor-level":[132],"implementation":[133],"process":[138],"utilizing":[140],"transistor.":[142]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2020,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}