{"id":"https://openalex.org/W3083341856","doi":"https://doi.org/10.1109/mwscas48704.2020.9184632","title":"A PMOS Switch Body and Gate Control Circuit for USB3.2 Compliant Receiver","display_name":"A PMOS Switch Body and Gate Control Circuit for USB3.2 Compliant Receiver","publication_year":2020,"publication_date":"2020-08-01","ids":{"openalex":"https://openalex.org/W3083341856","doi":"https://doi.org/10.1109/mwscas48704.2020.9184632","mag":"3083341856"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas48704.2020.9184632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas48704.2020.9184632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051535771","display_name":"Siamak Delshadpour","orcid":"https://orcid.org/0000-0003-4010-2362"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Siamak Delshadpour","raw_affiliation_strings":["NXP Semiconductors, Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Semiconductors, Chandler, AZ, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042411940","display_name":"Xu Zhang","orcid":"https://orcid.org/0000-0001-5481-9968"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xu Zhang","raw_affiliation_strings":["NXP Semiconductors, Chandler, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Semiconductors, Chandler, AZ, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10543372,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"962","last_page":"965"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.8913886547088623},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6332014203071594},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.6093398332595825},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.5967209339141846},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5552828311920166},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4452981948852539},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4142676591873169},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2656009793281555},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2502099275588989}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.8913886547088623},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6332014203071594},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.6093398332595825},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5967209339141846},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5552828311920166},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4452981948852539},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4142676591873169},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2656009793281555},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2502099275588989},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas48704.2020.9184632","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas48704.2020.9184632","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1525247915","https://openalex.org/W1639336371","https://openalex.org/W1994140213","https://openalex.org/W2098335407","https://openalex.org/W2164902374","https://openalex.org/W2167393507","https://openalex.org/W2792207120","https://openalex.org/W2914927987","https://openalex.org/W2982393564","https://openalex.org/W3000873127","https://openalex.org/W3014231583","https://openalex.org/W6636746223"],"related_works":["https://openalex.org/W2095795001","https://openalex.org/W1534657026","https://openalex.org/W1845449242","https://openalex.org/W2806295079","https://openalex.org/W2730314563","https://openalex.org/W2058541779","https://openalex.org/W2128000918","https://openalex.org/W2918058197","https://openalex.org/W1909493995","https://openalex.org/W2924345281"],"abstract_inverted_index":{"In":[0],"this":[1,128],"paper,":[2],"a":[3,77,88],"body":[4,82,121],"and":[5,25,30,56,83,120],"gate":[6,84,119],"control":[7,85],"circuit":[8,86,94],"for":[9,17,45,66,103],"PMOS":[10,101,123],"switch":[11,102],"that":[12,142],"makes":[13],"it":[14],"low":[15],"leakage":[16,34,98],"VDD=0V":[18,147],"condition":[19,48],"is":[20,23,124,144],"presented.":[21],"It":[22,52],"designed":[24],"implemented":[26,57,81],"in":[27,40,146],"CMOS":[28],"technology":[29],"guarantees":[31],"the":[32,62,97,100,115,125],"pin":[33],"stays":[35],"below":[36],"50uA":[37],"when":[38],"VPIN=0.5V":[39],"absence":[41],"of":[42,61,99,114,118,122,127,134],"supply":[43],"voltage":[44,92,106],"all":[46,104],"PVT":[47],"with":[49],"significant":[50],"margin.":[51],"has":[53],"been":[54],"developed":[55],"to":[58,69,76,95,138,140],"guarantee":[59],"one":[60],"USB3.2":[63],"compliance":[64],"test":[65],"signal":[67],"conditioner":[68],"avoid":[70],"misleading":[71],"host":[72,139],"from":[73],"sending":[74],"data":[75],"dead":[78,145],"device.":[79],"The":[80],"uses":[87],"subthreshold":[89],"based":[90],"maximum":[91],"selector":[93],"reduce":[96],"supply/pin":[105],"combinations":[107],"while":[108],"not":[109],"impacting":[110],"its":[111],"normal":[112],"functionality":[113],"switch.":[116],"Control":[117],"significance":[126],"work":[129],"which":[130],"shows":[131],"an":[132],"Rin":[133],"larger":[135],"than":[136],"10k-ohm":[137],"show":[141],"device":[143],"condition.":[148]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}