{"id":"https://openalex.org/W2982508900","doi":"https://doi.org/10.1109/mwscas.2019.8885398","title":"Low Sensitivity Coupled CMOS CCII Biquads","display_name":"Low Sensitivity Coupled CMOS CCII Biquads","publication_year":2019,"publication_date":"2019-08-01","ids":{"openalex":"https://openalex.org/W2982508900","doi":"https://doi.org/10.1109/mwscas.2019.8885398","mag":"2982508900"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2019.8885398","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2019.8885398","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034946927","display_name":"Edi Emanovi\u0107","orcid":"https://orcid.org/0009-0000-0151-2225"},"institutions":[{"id":"https://openalex.org/I181343428","display_name":"University of Zagreb","ror":"https://ror.org/00mv6sv71","country_code":"HR","type":"education","lineage":["https://openalex.org/I181343428"]}],"countries":["HR"],"is_corresponding":false,"raw_author_name":"Edi Emanovic","raw_affiliation_strings":["Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia","institution_ids":["https://openalex.org/I181343428"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059350419","display_name":"Dra\u017een Juri\u0161i\u0107","orcid":"https://orcid.org/0000-0002-5263-5249"},"institutions":[{"id":"https://openalex.org/I181343428","display_name":"University of Zagreb","ror":"https://ror.org/00mv6sv71","country_code":"HR","type":"education","lineage":["https://openalex.org/I181343428"]}],"countries":["HR"],"is_corresponding":false,"raw_author_name":"Drazen Jurisic","raw_affiliation_strings":["Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia","institution_ids":["https://openalex.org/I181343428"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017200623","display_name":"G.S. Moschytz","orcid":null},"institutions":[{"id":"https://openalex.org/I13955877","display_name":"Bar-Ilan University","ror":"https://ror.org/03kgsv495","country_code":"IL","type":"education","lineage":["https://openalex.org/I13955877"]},{"id":"https://openalex.org/I181343428","display_name":"University of Zagreb","ror":"https://ror.org/00mv6sv71","country_code":"HR","type":"education","lineage":["https://openalex.org/I181343428"]}],"countries":["HR","IL"],"is_corresponding":false,"raw_author_name":"George S. Moschytz","raw_affiliation_strings":["Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia","Faculty of Engineering, Bar-Ilan University, Ramat-Gan, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia","institution_ids":["https://openalex.org/I181343428"]},{"raw_affiliation_string":"Faculty of Engineering, Bar-Ilan University, Ramat-Gan, Israel","institution_ids":["https://openalex.org/I13955877"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0997,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.45460669,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"365","last_page":"368"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/digital-biquad-filter","display_name":"Digital biquad filter","score":0.9219412803649902},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5912436842918396},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.5822433233261108},{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.5722776651382446},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.5305163264274597},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49314945936203003},{"id":"https://openalex.org/keywords/passive-integrator-circuit","display_name":"Passive integrator circuit","score":0.47059857845306396},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.4526592791080475},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4518435001373291},{"id":"https://openalex.org/keywords/band-pass-filter","display_name":"Band-pass filter","score":0.4104804992675781},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3568188548088074},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3567151427268982},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.31709185242652893},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.27453863620758057},{"id":"https://openalex.org/keywords/rc-circuit","display_name":"RC circuit","score":0.2429932951927185},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.16325867176055908},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14631545543670654},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09791019558906555},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08663249015808105}],"concepts":[{"id":"https://openalex.org/C14455310","wikidata":"https://www.wikidata.org/wiki/Q5276043","display_name":"Digital biquad filter","level":4,"score":0.9219412803649902},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5912436842918396},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.5822433233261108},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.5722776651382446},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.5305163264274597},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49314945936203003},{"id":"https://openalex.org/C30839866","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Passive integrator circuit","level":5,"score":0.47059857845306396},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.4526592791080475},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4518435001373291},{"id":"https://openalex.org/C147788027","wikidata":"https://www.wikidata.org/wiki/Q2718101","display_name":"Band-pass filter","level":2,"score":0.4104804992675781},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3568188548088074},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3567151427268982},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.31709185242652893},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.27453863620758057},{"id":"https://openalex.org/C39394816","wikidata":"https://www.wikidata.org/wiki/Q939318","display_name":"RC circuit","level":4,"score":0.2429932951927185},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.16325867176055908},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14631545543670654},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09791019558906555},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08663249015808105}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2019.8885398","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2019.8885398","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7599999904632568}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2089186788","https://openalex.org/W2735785283","https://openalex.org/W2801705108","https://openalex.org/W2913621621","https://openalex.org/W2970564090","https://openalex.org/W4239393462"],"related_works":["https://openalex.org/W2090668620","https://openalex.org/W2130119779","https://openalex.org/W2118675504","https://openalex.org/W2086223105","https://openalex.org/W2065081920","https://openalex.org/W1797388846","https://openalex.org/W2032779953","https://openalex.org/W2162104246","https://openalex.org/W2113397720","https://openalex.org/W1979000974"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"examine":[4],"the":[5,11,36,43,48,56,72,85,104],"influence":[6,42],"of":[7,20,50,71,74],"coupling":[8],"to":[9,13,100],"reduce":[10],"sensitivity":[12,99],"component":[14,101],"tolerances":[15,102],"in":[16],"a":[17,21,51,94],"CMOS-CCII":[18],"realization":[19],"fourth-order":[22,52],"band-pass":[23,54],"filter":[24],"using":[25,67],"two":[26],"two-integrator":[27],"biquads:":[28],"cascaded":[29],"and":[30,93],"coupled.":[31],"It":[32,81],"is":[33,58,77,82],"shown":[34],"how":[35],"CCII":[37,92],"non-idealities,":[38],"causing":[39],"lossy":[40],"integrators,":[41],"coupled":[44,86],"biquad":[45,106],"design.":[46],"With":[47],"example":[49],"1MHz/100kHz":[53],"filter,":[55],"design":[57],"tested":[59],"with":[60,63,79],"post-layout":[61],"simulations":[62],"AMS":[64],"0.35-micron":[65],"technology":[66],"Cadence.":[68,80],"The":[69],"analysis":[70],"performance":[73],"both":[75],"filters":[76],"done":[78],"demonstrated":[83],"that":[84],"biquads,":[87],"although":[88],"having":[89],"one":[90],"more":[91],"resistor,":[95],"have":[96],"significantly":[97],"lower":[98],"than":[103],"equivalent":[105],"cascade.":[107]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
