{"id":"https://openalex.org/W2758584561","doi":"https://doi.org/10.1109/mwscas.2017.8053096","title":"1-1 MASH \u0394\u03a3 time-to-digital converter with differential cascode time integrator","display_name":"1-1 MASH \u0394\u03a3 time-to-digital converter with differential cascode time integrator","publication_year":2017,"publication_date":"2017-08-01","ids":{"openalex":"https://openalex.org/W2758584561","doi":"https://doi.org/10.1109/mwscas.2017.8053096","mag":"2758584561"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2017.8053096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8053096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101852631","display_name":"Young Jun Park","orcid":"https://orcid.org/0000-0002-1461-5597"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Young Jun Park","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada","institution_ids":["https://openalex.org/I530967"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100698597","display_name":"Fei Yuan","orcid":"https://orcid.org/0000-0001-7758-5455"},"institutions":[{"id":"https://openalex.org/I530967","display_name":"Toronto Metropolitan University","ror":"https://ror.org/05g13zd79","country_code":"CA","type":"education","lineage":["https://openalex.org/I530967"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Fei Yuan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON, Canada","institution_ids":["https://openalex.org/I530967"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1462,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.52290582,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1005","last_page":"1008"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cascode","display_name":"Cascode","score":0.8713699579238892},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.7978802919387817},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7109431028366089},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6705671548843384},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.5814446806907654},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5712091326713562},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5570620894432068},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5178613662719727},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.47010868787765503},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.44051510095596313},{"id":"https://openalex.org/keywords/rise-time","display_name":"Rise time","score":0.4248659014701843},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.40414708852767944},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40356892347335815},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29535675048828125},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.1318894922733307}],"concepts":[{"id":"https://openalex.org/C2775946640","wikidata":"https://www.wikidata.org/wiki/Q1735017","display_name":"Cascode","level":4,"score":0.8713699579238892},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.7978802919387817},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7109431028366089},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6705671548843384},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.5814446806907654},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5712091326713562},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5570620894432068},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5178613662719727},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.47010868787765503},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.44051510095596313},{"id":"https://openalex.org/C47586369","wikidata":"https://www.wikidata.org/wiki/Q377672","display_name":"Rise time","level":3,"score":0.4248659014701843},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.40414708852767944},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40356892347335815},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29535675048828125},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.1318894922733307},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2017.8053096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8053096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8600000143051147}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1993597884","https://openalex.org/W2061475693","https://openalex.org/W2094282675","https://openalex.org/W2096434843","https://openalex.org/W2117325338","https://openalex.org/W2157194265","https://openalex.org/W2884519067"],"related_works":["https://openalex.org/W4289538008","https://openalex.org/W3186427148","https://openalex.org/W2138282914","https://openalex.org/W2065850627","https://openalex.org/W2017012638","https://openalex.org/W2071885361","https://openalex.org/W1966793535","https://openalex.org/W1964447062","https://openalex.org/W2088265144","https://openalex.org/W2758584561"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,15],"1-1":[4],"MASH":[5],"\u0394\u03a3":[6],"time-to-digital":[7],"converter":[8],"(TDC).":[9],"A":[10,30],"cascode":[11],"time":[12,32,38,94],"adder":[13],"with":[14,79],"raised":[16],"inverter":[17],"threshold":[18],"voltage":[19],"is":[20,40,55,61],"proposed":[21,41],"to":[22,42],"minimize":[23,43],"the":[24,50,53,87],"jitter":[25],"caused":[26],"by":[27],"current":[28],"mismatch.":[29],"differential":[31],"integrator":[33],"consisting":[34],"of":[35,49,52],"two":[36],"single-ended":[37],"integrators":[39],"even-order":[44],"harmonics.":[45],"The":[46,59],"detrimental":[47],"effect":[48],"nonidealities":[51],"TDC":[54,60,88],"examined":[56],"in":[57,63],"detail.":[58],"designed":[62],"an":[64],"IBM":[65],"130":[66],"nm":[67],"1.2V":[68],"CMOS":[69],"technology":[70],"and":[71],"analyzed":[72],"using":[73],"Spectre":[74],"from":[75],"Cadence":[76],"Design":[77],"Systems":[78],"BSIM4":[80],"device":[81],"models.":[82],"Simulation":[83],"results":[84],"demonstrate":[85],"that":[86],"yields":[89],"2nd-order":[90],"noise-shaping,":[91],"1.9":[92],"ps":[93],"resolution":[95],"over":[96],"48~415":[97],"kHz":[98],"signal":[99],"band":[100],"while":[101],"consuming":[102],"502":[103],"\u03bcW.":[104]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}