{"id":"https://openalex.org/W2759608471","doi":"https://doi.org/10.1109/mwscas.2017.8053048","title":"A super class-AB OTA with high output current and no open loop gain degradation","display_name":"A super class-AB OTA with high output current and no open loop gain degradation","publication_year":2017,"publication_date":"2017-08-01","ids":{"openalex":"https://openalex.org/W2759608471","doi":"https://doi.org/10.1109/mwscas.2017.8053048","mag":"2759608471"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2017.8053048","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8053048","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032973784","display_name":"Shirin Pourashraf","orcid":"https://orcid.org/0000-0002-1852-6989"},"institutions":[{"id":"https://openalex.org/I10052268","display_name":"New Mexico State University","ror":"https://ror.org/00hpz7z43","country_code":"US","type":"education","lineage":["https://openalex.org/I10052268"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Shirin Pourashraf","raw_affiliation_strings":["NMSU, Klipsch School of Electrical and Computer Engineering, Las Cruces, USA"],"affiliations":[{"raw_affiliation_string":"NMSU, Klipsch School of Electrical and Computer Engineering, Las Cruces, USA","institution_ids":["https://openalex.org/I10052268"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045738320","display_name":"J. Ram\u00edrez\u2010Angulo","orcid":"https://orcid.org/0000-0001-5977-616X"},"institutions":[{"id":"https://openalex.org/I10052268","display_name":"New Mexico State University","ror":"https://ror.org/00hpz7z43","country_code":"US","type":"education","lineage":["https://openalex.org/I10052268"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jaime Ramirez-Angulo","raw_affiliation_strings":["NMSU, Klipsch School of Electrical and Computer Engineering, Las Cruces, USA"],"affiliations":[{"raw_affiliation_string":"NMSU, Klipsch School of Electrical and Computer Engineering, Las Cruces, USA","institution_ids":["https://openalex.org/I10052268"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084248588","display_name":"Antonio J. L\u00f3pez\u2010Mart\u00edn","orcid":"https://orcid.org/0000-0001-7629-0305"},"institutions":[{"id":"https://openalex.org/I175051016","display_name":"Universidad Publica de Navarra","ror":"https://ror.org/02z0cah89","country_code":"ES","type":"education","lineage":["https://openalex.org/I175051016"]},{"id":"https://openalex.org/I88155538","display_name":"Universidad de Navarra","ror":"https://ror.org/02rxc7m23","country_code":"ES","type":"education","lineage":["https://openalex.org/I88155538"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio J. Lopez-Martin","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Public University of Navarra, Pamplona, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Public University of Navarra, Pamplona, Spain","institution_ids":["https://openalex.org/I175051016","https://openalex.org/I88155538"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089442866","display_name":"R.G. Carvajal","orcid":"https://orcid.org/0000-0003-3891-8987"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Ramon Gonzalez-Carvajal","raw_affiliation_strings":["Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad de Sevilla, Spain"],"affiliations":[{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad de Sevilla, Spain","institution_ids":["https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5032973784"],"corresponding_institution_ids":["https://openalex.org/I10052268"],"apc_list":null,"apc_paid":null,"fwci":0.5475,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.67892407,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"1","issue":null,"first_page":"815","last_page":"818"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11472","display_name":"Analytical Chemistry and Sensors","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1502","display_name":"Bioengineering"},"field":{"id":"https://openalex.org/fields/15","display_name":"Chemical Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11472","display_name":"Analytical Chemistry and Sensors","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1502","display_name":"Bioengineering"},"field":{"id":"https://openalex.org/fields/15","display_name":"Chemical Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/slew-rate","display_name":"Slew rate","score":0.9284585118293762},{"id":"https://openalex.org/keywords/cascode","display_name":"Cascode","score":0.6111383438110352},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.6068723201751709},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5298338532447815},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.48428791761398315},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46703454852104187},{"id":"https://openalex.org/keywords/open-loop-controller","display_name":"Open-loop controller","score":0.46205487847328186},{"id":"https://openalex.org/keywords/loop-gain","display_name":"Loop gain","score":0.4535242021083832},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.4459913372993469},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.4453471899032593},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.43781599402427673},{"id":"https://openalex.org/keywords/high-gain-antenna","display_name":"High-gain antenna","score":0.43773970007896423},{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.4270167946815491},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.42117422819137573},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.42036929726600647},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3311983346939087},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17745324969291687},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16843175888061523},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.14197099208831787},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14078012108802795},{"id":"https://openalex.org/keywords/closed-loop","display_name":"Closed loop","score":0.12368705868721008},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.10243245959281921},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.06409481167793274}],"concepts":[{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.9284585118293762},{"id":"https://openalex.org/C2775946640","wikidata":"https://www.wikidata.org/wiki/Q1735017","display_name":"Cascode","level":4,"score":0.6111383438110352},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.6068723201751709},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5298338532447815},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.48428791761398315},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46703454852104187},{"id":"https://openalex.org/C161362739","wikidata":"https://www.wikidata.org/wiki/Q2301555","display_name":"Open-loop controller","level":3,"score":0.46205487847328186},{"id":"https://openalex.org/C199943209","wikidata":"https://www.wikidata.org/wiki/Q1271153","display_name":"Loop gain","level":3,"score":0.4535242021083832},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.4459913372993469},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.4453471899032593},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.43781599402427673},{"id":"https://openalex.org/C61829901","wikidata":"https://www.wikidata.org/wiki/Q769152","display_name":"High-gain antenna","level":2,"score":0.43773970007896423},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.4270167946815491},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.42117422819137573},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.42036929726600647},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3311983346939087},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17745324969291687},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16843175888061523},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.14197099208831787},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14078012108802795},{"id":"https://openalex.org/C3019251811","wikidata":"https://www.wikidata.org/wiki/Q5135346","display_name":"Closed loop","level":2,"score":0.12368705868721008},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.10243245959281921},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.06409481167793274},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2017.8053048","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8053048","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1550457931","https://openalex.org/W1578814374","https://openalex.org/W1946609993","https://openalex.org/W1985987051","https://openalex.org/W1994437577","https://openalex.org/W2003062341","https://openalex.org/W2012963133","https://openalex.org/W2020916273","https://openalex.org/W2042786651","https://openalex.org/W2054458541","https://openalex.org/W2061560738","https://openalex.org/W2107781045","https://openalex.org/W2138289226","https://openalex.org/W2144463570","https://openalex.org/W2145115148","https://openalex.org/W2161907344","https://openalex.org/W2188613204","https://openalex.org/W2473818668","https://openalex.org/W2488316733","https://openalex.org/W2607342090","https://openalex.org/W2610728744","https://openalex.org/W2620435191","https://openalex.org/W2731468410","https://openalex.org/W4285719527","https://openalex.org/W6720445593"],"related_works":["https://openalex.org/W1505753352","https://openalex.org/W1991995876","https://openalex.org/W3208453442","https://openalex.org/W2254107430","https://openalex.org/W3134607556","https://openalex.org/W2401196484","https://openalex.org/W2568342471","https://openalex.org/W2883218012","https://openalex.org/W2104907094","https://openalex.org/W2509721189"],"abstract_inverted_index":{"A":[0],"scheme":[1,52],"to":[2,58],"achieve":[3],"simultaneously":[4],"extremely":[5],"high":[6,36],"slew":[7,62],"rate":[8,63],"improvement":[9,88],"and":[10,61,91],"avoiding":[11],"open":[12,47,79],"loop":[13,48,80],"gain":[14,60,81],"degradation":[15],"in":[16,73,89],"one":[17],"stage":[18],"super":[19,30,70],"class-AB":[20,31,71],"op-amps":[21],"is":[22],"introduced.":[23],"It":[24],"overcomes":[25],"the":[26,42,46,99],"serious":[27],"shortcoming":[28],"of":[29,44,67,82,96],"OTAs":[32],"that":[33],"show":[34],"very":[35],"output":[37],"current":[38,93],"enhancement":[39,94],"factors":[40],"at":[41],"expense":[43],"degrading":[45],"gain.":[49],"The":[50],"proposed":[51,100],"uses":[53],"dynamically":[54],"biased":[55],"cascode":[56],"transistors":[57],"avoid":[59],"degradation.":[64],"Experimental":[65],"results":[66],"a":[68,85,92],"fabricated":[69],"OTA":[72],"180":[74],"nm":[75],"CMOS":[76],"technology":[77],"with":[78],"67":[83],"dB,":[84],"factor":[86,95],"two":[87],"GBW":[90],"270":[97],"verify":[98],"scheme.":[101]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}