{"id":"https://openalex.org/W2745913163","doi":"https://doi.org/10.1109/mwscas.2017.8053035","title":"A 0.5 V fully differential transimpedance amplifier in 65-nm CMOS technology","display_name":"A 0.5 V fully differential transimpedance amplifier in 65-nm CMOS technology","publication_year":2017,"publication_date":"2017-08-01","ids":{"openalex":"https://openalex.org/W2745913163","doi":"https://doi.org/10.1109/mwscas.2017.8053035","mag":"2745913163"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2017.8053035","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8053035","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004843872","display_name":"Hugo Garc\u00eda\u2010V\u00e1zquez","orcid":"https://orcid.org/0000-0003-0942-5761"},"institutions":[{"id":"https://openalex.org/I130929987","display_name":"University of Mons","ror":"https://ror.org/02qnnz951","country_code":"BE","type":"education","lineage":["https://openalex.org/I130929987"]}],"countries":["BE"],"is_corresponding":true,"raw_author_name":"Hugo Garc\u00eda-V\u00e1zquez","raw_affiliation_strings":["Analog and Mixed Signal Design Group, Electronic and Microelectronic Unit, University of Mons, 31, Boulevard Dolez, 2nd building, 1st floor, 7000 Mons, Belgium","Analog and Mixed Signal Design Group, University of Mons 31, Mons, Belgium"],"affiliations":[{"raw_affiliation_string":"Analog and Mixed Signal Design Group, Electronic and Microelectronic Unit, University of Mons, 31, Boulevard Dolez, 2nd building, 1st floor, 7000 Mons, Belgium","institution_ids":["https://openalex.org/I130929987"]},{"raw_affiliation_string":"Analog and Mixed Signal Design Group, University of Mons 31, Mons, Belgium","institution_ids":["https://openalex.org/I130929987"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007049793","display_name":"Fortunato Carlos Dualibe","orcid":"https://orcid.org/0000-0002-2889-315X"},"institutions":[{"id":"https://openalex.org/I130929987","display_name":"University of Mons","ror":"https://ror.org/02qnnz951","country_code":"BE","type":"education","lineage":["https://openalex.org/I130929987"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Fortunato Carlos Dualibe","raw_affiliation_strings":["Analog and Mixed Signal Design Group, Electronic and Microelectronic Unit, University of Mons, 31, Boulevard Dolez, 2nd building, 1st floor, 7000 Mons, Belgium","Analog and Mixed Signal Design Group, University of Mons 31, Mons, Belgium"],"affiliations":[{"raw_affiliation_string":"Analog and Mixed Signal Design Group, Electronic and Microelectronic Unit, University of Mons, 31, Boulevard Dolez, 2nd building, 1st floor, 7000 Mons, Belgium","institution_ids":["https://openalex.org/I130929987"]},{"raw_affiliation_string":"Analog and Mixed Signal Design Group, University of Mons 31, Mons, Belgium","institution_ids":["https://openalex.org/I130929987"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016337535","display_name":"Grigory Popov","orcid":null},"institutions":[{"id":"https://openalex.org/I130929987","display_name":"University of Mons","ror":"https://ror.org/02qnnz951","country_code":"BE","type":"education","lineage":["https://openalex.org/I130929987"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Grigory Popov","raw_affiliation_strings":["Analog and Mixed Signal Design Group, Electronic and Microelectronic Unit, University of Mons, 31, Boulevard Dolez, 2nd building, 1st floor, 7000 Mons, Belgium","Analog and Mixed Signal Design Group, University of Mons 31, Mons, Belgium"],"affiliations":[{"raw_affiliation_string":"Analog and Mixed Signal Design Group, Electronic and Microelectronic Unit, University of Mons, 31, Boulevard Dolez, 2nd building, 1st floor, 7000 Mons, Belgium","institution_ids":["https://openalex.org/I130929987"]},{"raw_affiliation_string":"Analog and Mixed Signal Design Group, University of Mons 31, Mons, Belgium","institution_ids":["https://openalex.org/I130929987"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5004843872"],"corresponding_institution_ids":["https://openalex.org/I130929987"],"apc_list":null,"apc_paid":null,"fwci":0.3936,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.60933426,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"763","last_page":"766"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transimpedance-amplifier","display_name":"Transimpedance amplifier","score":0.9749125242233276},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7051346302032471},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.6013192534446716},{"id":"https://openalex.org/keywords/fully-differential-amplifier","display_name":"Fully differential amplifier","score":0.5776805877685547},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.5292633771896362},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5151118636131287},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.5061482787132263},{"id":"https://openalex.org/keywords/open-loop-gain","display_name":"Open-loop gain","score":0.49599775671958923},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4906274378299713},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46570828557014465},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.4481356739997864},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.44772085547447205},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.44523319602012634},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3849155306816101},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.33666324615478516},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2898363471031189},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13576629757881165}],"concepts":[{"id":"https://openalex.org/C92631468","wikidata":"https://www.wikidata.org/wiki/Q215437","display_name":"Transimpedance amplifier","level":5,"score":0.9749125242233276},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7051346302032471},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.6013192534446716},{"id":"https://openalex.org/C189184530","wikidata":"https://www.wikidata.org/wiki/Q5508342","display_name":"Fully differential amplifier","level":5,"score":0.5776805877685547},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.5292633771896362},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5151118636131287},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.5061482787132263},{"id":"https://openalex.org/C143931264","wikidata":"https://www.wikidata.org/wiki/Q5932986","display_name":"Open-loop gain","level":5,"score":0.49599775671958923},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4906274378299713},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46570828557014465},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.4481356739997864},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.44772085547447205},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.44523319602012634},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3849155306816101},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.33666324615478516},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2898363471031189},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13576629757881165}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/mwscas.2017.8053035","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8053035","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:accedacris.ulpgc.es:10553/45453","is_oa":false,"landing_page_url":"http://hdl.handle.net/10553/45453","pdf_url":null,"source":{"id":"https://openalex.org/S4306400136","display_name":"Acceda (Universidad de Las Palmas de Gran Canaria)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Midwest Symposium on Circuits and Systems[ISSN 1548-3746],v. 2017-August (8053035), p. 763-766","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:orbi.umons.ac.be:20.500.12907/42020","is_oa":false,"landing_page_url":"https://orbi.umons.ac.be/handle/20.500.12907/42020","pdf_url":null,"source":{"id":"https://openalex.org/S7407055454","display_name":"ORBi UMONS","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE International Midwest Symposium on Circuits and Systems (2017-08-08)","raw_type":"peer reviewed"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320318621","display_name":"Waalse Gewest","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1659025571","https://openalex.org/W1699730363","https://openalex.org/W1967723628","https://openalex.org/W2028706881","https://openalex.org/W2073471100","https://openalex.org/W2074772513","https://openalex.org/W2117680041","https://openalex.org/W2124879029","https://openalex.org/W2167034725","https://openalex.org/W2167242718","https://openalex.org/W2205215497","https://openalex.org/W2599557761","https://openalex.org/W2603425044"],"related_works":["https://openalex.org/W4387100143","https://openalex.org/W2363713303","https://openalex.org/W2389451406","https://openalex.org/W2098517669","https://openalex.org/W2939385727","https://openalex.org/W2394349332","https://openalex.org/W2109595889","https://openalex.org/W3106125200","https://openalex.org/W2368461489","https://openalex.org/W1972243127"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,14,19,48,64,83,90,98],"novel":[4],"fully":[5],"differential":[6],"ultra-low":[7],"voltage":[8,43,101],"transimpedance":[9,24,92],"amplifier":[10,60],"(TIA)":[11],"based":[12],"on":[13],"CMOS":[15,85],"translinear":[16],"circuit.":[17],"Following":[18],"simple":[20],"bias":[21],"strategy,":[22],"its":[23],"gain":[25,93],"can":[26],"be":[27],"adjusted":[28],"to":[29,70,87],"the":[30,52,72,102],"desired":[31],"accuracy":[32],"either":[33],"by":[34],"means":[35],"of":[36],"an":[37],"external":[38],"resistor":[39],"or":[40],"using":[41],"internal":[42],"and":[44,80,94],"current":[45],"references.":[46],"To":[47],"first":[49],"order":[50],"approach,":[51],"transresistance":[53],"results":[54],"independent":[55],"from":[56],"technological":[57],"parameters.":[58],"The":[59,76],"does":[61],"not":[62],"need":[63],"common":[65],"mode":[66],"feedback":[67],"circuit":[68,77],"(CMFB)":[69],"set":[71],"quiescent":[73],"output":[74],"voltages.":[75],"was":[78],"sized":[79],"simulated":[81],"in":[82],"65-nm":[84],"process":[86],"comply":[88],"with":[89],"10k\u03a9":[91],"1MHz@1pF":[95],"bandwidth.":[96],"For":[97],"0.5V":[99],"supply":[100],"total":[103],"power":[104],"consumption":[105],"is":[106],"78.5\u03bcW.":[107]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}