{"id":"https://openalex.org/W2756683678","doi":"https://doi.org/10.1109/mwscas.2017.8052870","title":"Ultra-compact sub-10nm logic circuits based on ambipolar SB-FinFETs","display_name":"Ultra-compact sub-10nm logic circuits based on ambipolar SB-FinFETs","publication_year":2017,"publication_date":"2017-08-01","ids":{"openalex":"https://openalex.org/W2756683678","doi":"https://doi.org/10.1109/mwscas.2017.8052870","mag":"2756683678"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2017.8052870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8052870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013991946","display_name":"Talha Furkan Canan","orcid":"https://orcid.org/0000-0002-7154-3622"},"institutions":[{"id":"https://openalex.org/I4210106879","display_name":"Ohio University","ror":"https://ror.org/01jr3y717","country_code":"US","type":"education","lineage":["https://openalex.org/I4210106879"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Talha Furkan Canan","raw_affiliation_strings":["School of Electrical Eng. & Computer Sci., Ohio University, Athens, OH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Eng. & Computer Sci., Ohio University, Athens, OH, USA","institution_ids":["https://openalex.org/I4210106879"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035472753","display_name":"Sava\u015f Kaya","orcid":"https://orcid.org/0000-0002-6010-1271"},"institutions":[{"id":"https://openalex.org/I4210106879","display_name":"Ohio University","ror":"https://ror.org/01jr3y717","country_code":"US","type":"education","lineage":["https://openalex.org/I4210106879"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Savas Kaya","raw_affiliation_strings":["School of Electrical Eng. & Computer Sci., Ohio University, Athens, OH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Eng. & Computer Sci., Ohio University, Athens, OH, USA","institution_ids":["https://openalex.org/I4210106879"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014895124","display_name":"Avinash Karanth","orcid":"https://orcid.org/0000-0002-9472-4637"},"institutions":[{"id":"https://openalex.org/I4210106879","display_name":"Ohio University","ror":"https://ror.org/01jr3y717","country_code":"US","type":"education","lineage":["https://openalex.org/I4210106879"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Avinash Kodi","raw_affiliation_strings":["School of Electrical Eng. & Computer Sci., Ohio University, Athens, OH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Eng. & Computer Sci., Ohio University, Athens, OH, USA","institution_ids":["https://openalex.org/I4210106879"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101805370","display_name":"Hao Xin","orcid":"https://orcid.org/0000-0002-0815-8828"},"institutions":[{"id":"https://openalex.org/I138006243","display_name":"University of Arizona","ror":"https://ror.org/03m2x1q45","country_code":"US","type":"education","lineage":["https://openalex.org/I138006243"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hao Xin","raw_affiliation_strings":["Department of Electrical and Computer Eng., University of Arizona, Tucson, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Eng., University of Arizona, Tucson, AZ, USA","institution_ids":["https://openalex.org/I138006243"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034189643","display_name":"Ahmed Louri","orcid":"https://orcid.org/0000-0003-4262-6688"},"institutions":[{"id":"https://openalex.org/I193531525","display_name":"George Washington University","ror":"https://ror.org/00y4zzh67","country_code":"US","type":"education","lineage":["https://openalex.org/I193531525"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ahmed Louri","raw_affiliation_strings":["Department of Electrical and Computer Eng., George Washington University, Washington, DC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Eng., George Washington University, Washington, DC, USA","institution_ids":["https://openalex.org/I193531525"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4386,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.66237023,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"100","last_page":"103"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ambipolar-diffusion","display_name":"Ambipolar diffusion","score":0.7805989980697632},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.7428212761878967},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6975705027580261},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6867852210998535},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6209437847137451},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5532780885696411},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5030035376548767},{"id":"https://openalex.org/keywords/nand-logic","display_name":"NAND logic","score":0.4937807023525238},{"id":"https://openalex.org/keywords/xor-gate","display_name":"XOR gate","score":0.45565012097358704},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44465237855911255},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4396810829639435},{"id":"https://openalex.org/keywords/and-or-invert","display_name":"AND-OR-Invert","score":0.4289751648902893},{"id":"https://openalex.org/keywords/gate-equivalent","display_name":"Gate equivalent","score":0.4186256527900696},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.38441601395606995},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.38418471813201904},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.34518203139305115},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2557244598865509},{"id":"https://openalex.org/keywords/gate-oxide","display_name":"Gate oxide","score":0.2543749213218689},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.21341416239738464},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19053801894187927},{"id":"https://openalex.org/keywords/electron","display_name":"Electron","score":0.0645647644996643}],"concepts":[{"id":"https://openalex.org/C25621703","wikidata":"https://www.wikidata.org/wiki/Q2658857","display_name":"Ambipolar diffusion","level":3,"score":0.7805989980697632},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.7428212761878967},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6975705027580261},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6867852210998535},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6209437847137451},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5532780885696411},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5030035376548767},{"id":"https://openalex.org/C7234692","wikidata":"https://www.wikidata.org/wiki/Q4116068","display_name":"NAND logic","level":4,"score":0.4937807023525238},{"id":"https://openalex.org/C28495749","wikidata":"https://www.wikidata.org/wiki/Q155516","display_name":"XOR gate","level":3,"score":0.45565012097358704},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44465237855911255},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4396810829639435},{"id":"https://openalex.org/C130126468","wikidata":"https://www.wikidata.org/wiki/Q4652943","display_name":"AND-OR-Invert","level":5,"score":0.4289751648902893},{"id":"https://openalex.org/C60697091","wikidata":"https://www.wikidata.org/wiki/Q5527009","display_name":"Gate equivalent","level":5,"score":0.4186256527900696},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.38441601395606995},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.38418471813201904},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.34518203139305115},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2557244598865509},{"id":"https://openalex.org/C2361726","wikidata":"https://www.wikidata.org/wiki/Q5527031","display_name":"Gate oxide","level":4,"score":0.2543749213218689},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.21341416239738464},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19053801894187927},{"id":"https://openalex.org/C147120987","wikidata":"https://www.wikidata.org/wiki/Q2225","display_name":"Electron","level":2,"score":0.0645647644996643},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2017.8052870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2017.8052870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5600000023841858,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2030665477","https://openalex.org/W2127587406","https://openalex.org/W2153865810","https://openalex.org/W2157679815","https://openalex.org/W2339660142","https://openalex.org/W2396174493","https://openalex.org/W2553781108"],"related_works":["https://openalex.org/W2565020286","https://openalex.org/W4361799621","https://openalex.org/W1017999001","https://openalex.org/W2963778543","https://openalex.org/W2517830798","https://openalex.org/W4295177619","https://openalex.org/W2168217865","https://openalex.org/W2152527810","https://openalex.org/W4297610477","https://openalex.org/W1789158442"],"abstract_inverted_index":{"Novel":[0],"ultra-compact":[1],"sub-10nm":[2],"XOR,":[3],"NOR":[4,133],"and":[5,19,30,36,61,124,132,163],"NAND":[6,131],"CMOS":[7,86,156],"logic":[8,140,157],"circuits":[9,141,158],"based":[10],"on":[11],"ambipolar":[12,48,118],"characteristics":[13],"of":[14,27,136,166],"Schottky-Barrier":[15],"(SB)":[16],"FinFET":[17],"devices":[18],"gate":[20,34,66,109,152],"metal":[21],"workfunction":[22,67,110],"engineering":[23,111],"are":[24,142],"introduced.":[25],"Use":[26],"SB":[28],"source":[29],"drain":[31],"contacts,":[32],"high-k":[33],"dielectrics":[35],"ultra-thin":[37],"body":[38],"bestows":[39],"extreme":[40],"short-channel":[41],"immunity":[42],"to":[43,79,100,115,127,155],"the":[44,52,65,137],"proposed":[45,138],"FinFETs":[46,119],"with":[47,69,120,144,168],"current-voltage":[49],"characteristics.":[50],"Thus,":[51],"main":[53],"physical":[54],"parameter":[55],"left":[56],"for":[57],"practical":[58],"device":[59],"design":[60,116],"threshold":[62],"control":[63],"is":[64,73],"along":[68],"independent-gate":[70],"drive,":[71],"which":[72,148],"creatively":[74],"used":[75],"in":[76],"this":[77],"work":[78],"build":[80],"a":[81,93,106,169],"novel":[82],"conjugate":[83],"(n/p":[84],"channel)":[85],"pass-gate":[87],"transistor":[88,102],"that":[89,150],"can":[90,112],"function":[91,128],"as":[92,98,129,159,161],"two-transistor":[94],"(2T)":[95],"XOR":[96],"gates":[97,123],"opposed":[99],"4":[101],"conventional":[103],"pass-gates.":[104],"In":[105],"similar":[107],"fashion,":[108],"be":[113],"utilized":[114],"unique":[117],"two":[121],"independent":[122],"high":[125],"thresholds":[126],"2T":[130],"gates.":[134],"Functionality":[135],"minimalist":[139],"verified":[143],"Synopsys":[145],"TCAD":[146],"simulations,":[147],"indicate":[149],"optimized":[151],"work-functions":[153],"lead":[154],"small":[160],"5nm":[162],"supply":[164],"voltage":[165],"0.6V,":[167],"power-delay":[170],"product":[171],"at":[172],"5":[173],"\u00d7":[174],"10":[175],"<sup":[176],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[177],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-18</sup>":[178],"J":[179],"level.":[180]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}