{"id":"https://openalex.org/W2593121212","doi":"https://doi.org/10.1109/mwscas.2016.7870047","title":"An overview of digital-intensive \u0394\u03a3 phase-locked loops utilizing 1-bit conversion and modulation","display_name":"An overview of digital-intensive \u0394\u03a3 phase-locked loops utilizing 1-bit conversion and modulation","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2593121212","doi":"https://doi.org/10.1109/mwscas.2016.7870047","mag":"2593121212"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2016.7870047","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2016.7870047","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025671584","display_name":"Woogeun Rhee","orcid":"https://orcid.org/0000-0003-2473-4132"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Woogeun Rhee","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048334113","display_name":"Sitao Lv","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Sitao Lv","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100349061","display_name":"Han Liu","orcid":"https://orcid.org/0000-0003-1021-9973"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Han Liu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058533905","display_name":"Ni Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210154351","display_name":"Marvell (United States)","ror":"https://ror.org/04wmff902","country_code":"US","type":"company","lineage":["https://openalex.org/I4210092679","https://openalex.org/I4210154351"]}],"countries":["CN","US"],"is_corresponding":false,"raw_author_name":"Ni Xu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China","Now with Marvell Semiconductor, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]},{"raw_affiliation_string":"Now with Marvell Semiconductor, Santa Clara, CA","institution_ids":["https://openalex.org/I4210154351"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100356864","display_name":"Zhihua Wang","orcid":"https://orcid.org/0000-0001-6567-0759"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihua Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5025671584"],"corresponding_institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17429873,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"46","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.9498295783996582},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7302868366241455},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6324012279510498},{"id":"https://openalex.org/keywords/modulation","display_name":"Modulation (music)","score":0.6129875183105469},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6040424704551697},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.48612546920776367},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.4551723599433899},{"id":"https://openalex.org/keywords/digitally-controlled-oscillator","display_name":"Digitally controlled oscillator","score":0.43590691685676575},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21642574667930603},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.203720360994339},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.16709080338478088},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.14448165893554688},{"id":"https://openalex.org/keywords/delay-line-oscillator","display_name":"Delay line oscillator","score":0.13855895400047302}],"concepts":[{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.9498295783996582},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7302868366241455},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6324012279510498},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.6129875183105469},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6040424704551697},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.48612546920776367},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.4551723599433899},{"id":"https://openalex.org/C167872736","wikidata":"https://www.wikidata.org/wiki/Q5276224","display_name":"Digitally controlled oscillator","level":5,"score":0.43590691685676575},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21642574667930603},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.203720360994339},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.16709080338478088},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.14448165893554688},{"id":"https://openalex.org/C26907483","wikidata":"https://www.wikidata.org/wiki/Q5253479","display_name":"Delay line oscillator","level":4,"score":0.13855895400047302},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2016.7870047","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2016.7870047","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5199999809265137,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1486735757","https://openalex.org/W1569484296","https://openalex.org/W1996295125","https://openalex.org/W2008857137","https://openalex.org/W2028941857","https://openalex.org/W2036880312","https://openalex.org/W2049203894","https://openalex.org/W2084208879","https://openalex.org/W2094654792","https://openalex.org/W2094903094","https://openalex.org/W2108435403","https://openalex.org/W2110675623","https://openalex.org/W2112328125","https://openalex.org/W2113415825","https://openalex.org/W2151659230","https://openalex.org/W2160412553","https://openalex.org/W2167284852","https://openalex.org/W2172587493","https://openalex.org/W2180973527","https://openalex.org/W2241062176"],"related_works":["https://openalex.org/W2380467267","https://openalex.org/W1980525453","https://openalex.org/W2325206724","https://openalex.org/W2043945969","https://openalex.org/W2103754166","https://openalex.org/W2058003010","https://openalex.org/W2075683814","https://openalex.org/W2952154040","https://openalex.org/W2462393914","https://openalex.org/W2220638383"],"abstract_inverted_index":{"The":[0],"digital":[1],"phase-locked":[2],"loop":[3],"(DPLL)":[4],"enables":[5],"robust":[6],"clock":[7],"generation":[8,85],"with":[9,88],"advanced":[10],"CMOS":[11],"technology":[12],"but":[13],"suffers":[14],"from":[15],"nonlinearity":[16,32,60],"and":[17,68,86],"resolution":[18],"problems":[19],"of":[20,33,72,79],"the":[21,26,31,34,59,77,80,89,93],"time-to-digital":[22],"converter":[23],"(TDC).":[24],"In":[25],"DPLL":[27,41,81],"based":[28],"two-point":[29],"modulator,":[30],"digitally-controlled":[35],"oscillator":[36],"(DCO)":[37],"is":[38],"also":[39],"critical.":[40],"architectures":[42],"that":[43],"utilize":[44],"a":[45,49],"1-bit":[46,50,90,94],"conversion":[47],"or":[48,92],"\u0394\u03a3":[51],"modulation":[52,87],"method":[53],"are":[54],"recently":[55],"proposed":[56],"to":[57],"relax":[58],"problem.":[61],"This":[62],"paper":[63],"discusses":[64],"TDC":[65,91],"design":[66,78],"issues":[67],"gives":[69],"an":[70],"overview":[71],"some":[73],"useful":[74],"techniques":[75],"in":[76],"which":[82],"performs":[83],"clock/frequency":[84],"DCO":[95],"modulation.":[96]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}