{"id":"https://openalex.org/W1644812844","doi":"https://doi.org/10.1109/mwscas.2015.7282032","title":"A low-power hybrid ADC architecture for high-speed medium-resolution applications","display_name":"A low-power hybrid ADC architecture for high-speed medium-resolution applications","publication_year":2015,"publication_date":"2015-08-01","ids":{"openalex":"https://openalex.org/W1644812844","doi":"https://doi.org/10.1109/mwscas.2015.7282032","mag":"1644812844"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2015.7282032","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2015.7282032","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051204131","display_name":"Seyed Alireza Zahrai","orcid":null},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Seyed Alireza Zahrai","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, USA","Department of Electrical and Computer Engineering, Northeastern University,Boston,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University,Boston,USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082452997","display_name":"Marvin Onabajo","orcid":"https://orcid.org/0000-0002-6044-3693"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marvin Onabajo","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, USA","Department of Electrical and Computer Engineering, Northeastern University,Boston,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University,Boston,USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":5.3927,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.96033964,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"55","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8359049558639526},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7108684778213501},{"id":"https://openalex.org/keywords/flash-adc","display_name":"Flash ADC","score":0.5934222340583801},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5907964706420898},{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.5650402307510376},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5635353326797485},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5624562501907349},{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"Analog-to-digital converter","score":0.5489193201065063},{"id":"https://openalex.org/keywords/sample-and-hold","display_name":"Sample and hold","score":0.49286794662475586},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.42984604835510254},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4173809587955475},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.35339465737342834},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3399917483329773},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2703075408935547},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1072598397731781}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8359049558639526},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7108684778213501},{"id":"https://openalex.org/C164862427","wikidata":"https://www.wikidata.org/wiki/Q2744647","display_name":"Flash ADC","level":4,"score":0.5934222340583801},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5907964706420898},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.5650402307510376},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5635353326797485},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5624562501907349},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.5489193201065063},{"id":"https://openalex.org/C206565188","wikidata":"https://www.wikidata.org/wiki/Q836482","display_name":"Sample and hold","level":3,"score":0.49286794662475586},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.42984604835510254},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4173809587955475},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.35339465737342834},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3399917483329773},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2703075408935547},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1072598397731781}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2015.7282032","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2015.7282032","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1979509961","https://openalex.org/W2064100429","https://openalex.org/W2079575076","https://openalex.org/W2082665168","https://openalex.org/W2125944154","https://openalex.org/W2145725267","https://openalex.org/W2147723118"],"related_works":["https://openalex.org/W2593119273","https://openalex.org/W2161345192","https://openalex.org/W2759986866","https://openalex.org/W2104938423","https://openalex.org/W2125944154","https://openalex.org/W3202980289","https://openalex.org/W2075144748","https://openalex.org/W4386387962","https://openalex.org/W2341231357","https://openalex.org/W2543967508"],"abstract_inverted_index":{"A":[0,54,84,116],"low-power":[1,42],"hybrid":[2,135],"analog-to-digital":[3],"converter":[4,60],"(ADC)":[5],"architecture":[6,14],"for":[7],"high-speed":[8],"medium-resolution":[9],"applications":[10],"is":[11,15,63,107,176],"introduced.":[12],"The":[13,34,134,172],"a":[16,24,110,142,157,179],"subranging":[17],"time-interleaved":[18,41],"ADC.":[19],"In":[20],"the":[21,29,72,76,81,88,95,99,120,125,169],"first":[22],"stage,":[23],"fast":[25],"flash":[26],"ADC":[27,97,106,136],"resolves":[28],"three":[30],"most":[31],"significant":[32,131],"bits.":[33],"remaining":[35],"bits":[36],"are":[37],"generated":[38],"by":[39],"four":[40],"successive":[43],"approximation":[44],"register":[45],"(SAR)":[46],"ADCs,":[47],"leading":[48,129],"to":[49,65,70,75,130,168],"8-bit":[50],"1GS/s":[51],"operation":[52],"overall.":[53],"combined":[55],"sample-and-hold":[56],"and":[57,69,91,139,147],"capacitive":[58],"digital-to-analog":[59],"(SHDAC)":[61],"circuit":[62,149],"proposed":[64],"perform":[66],"front-end":[67],"sampling":[68],"shift":[71],"sampled":[73],"voltage":[74,121],"optimal":[77],"operating":[78],"region":[79],"of":[80,94,144,161],"second":[82],"stage.":[83],"buffer":[85,122],"stage":[86,123],"suppresses":[87],"loading":[89],"effects":[90],"kickback":[92],"noise":[93],"SAR":[96,105],"on":[98],"SHDAC":[100],"in":[101,119,151],"each":[102],"channel.":[103],"Each":[104],"implemented":[108],"with":[109,141,163],"comparator-based":[111],"asynchronous":[112],"binary-search":[113],"(CABS)":[114],"architecture.":[115],"switching":[117],"scheme":[118],"relaxes":[124],"amplifier":[126],"specification":[127],"requirements,":[128],"power":[132,174],"reduction.":[133],"was":[137],"designed":[138],"simulated":[140],"mix":[143],"behavioral":[145],"models":[146],"transistor-level":[148],"designs":[150],"130nm":[152],"CMOS":[153],"technology.":[154],"It":[155],"has":[156],"signal-to-noise-and-distortion":[158],"ratio":[159],"(SNDR)":[160],"47.5dB":[162],"an":[164],"input":[165],"signal":[166],"close":[167],"Nyquist":[170],"frequency.":[171],"estimated":[173],"consumption":[175],"17mW":[177],"from":[178],"1.2V":[180],"supply.":[181]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}