{"id":"https://openalex.org/W2029837033","doi":"https://doi.org/10.1109/mwscas.2014.6908562","title":"A novel flexible 16-core MP-SoC architecture based on parallel skeletons for image processing applications","display_name":"A novel flexible 16-core MP-SoC architecture based on parallel skeletons for image processing applications","publication_year":2014,"publication_date":"2014-08-01","ids":{"openalex":"https://openalex.org/W2029837033","doi":"https://doi.org/10.1109/mwscas.2014.6908562","mag":"2029837033"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2014.6908562","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908562","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091146903","display_name":"Mohamed Amine Boussadi","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Mohamed Amine Boussadi","raw_affiliation_strings":["Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","Inst. Pascal, UBP, Aubiere, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I169645620"]},{"raw_affiliation_string":"Inst. Pascal, UBP, Aubiere, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066367779","display_name":"Thierry Tixier","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Thierry Tixier","raw_affiliation_strings":["Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","Inst. Pascal, UBP, Aubiere, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I169645620"]},{"raw_affiliation_string":"Inst. Pascal, UBP, Aubiere, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026401172","display_name":"Alexis Landrault","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Alexis Landrault","raw_affiliation_strings":["Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","Inst. Pascal, UBP, Aubiere, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I169645620"]},{"raw_affiliation_string":"Inst. Pascal, UBP, Aubiere, France","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109950710","display_name":"Jean-Pierre D\u00e9rutin","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean-Pierre Derutin","raw_affiliation_strings":["Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","Inst. Pascal, UBP, Aubiere, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut Pascal \u2014 UMR 6602 CNRS/UBP/IFMA, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I169645620"]},{"raw_affiliation_string":"Inst. Pascal, UBP, Aubiere, France","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4079,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.51564194,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"19","issue":null,"first_page":"905","last_page":"908"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8008561730384827},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6663455963134766},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5964058041572571},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5762280821800232},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5088708400726318},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4869445562362671},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.4832192659378052},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4464973211288452},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.44527560472488403},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3241468071937561},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.19479215145111084},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09214869141578674}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8008561730384827},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6663455963134766},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5964058041572571},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5762280821800232},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5088708400726318},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4869445562362671},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.4832192659378052},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4464973211288452},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.44527560472488403},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3241468071937561},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.19479215145111084},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09214869141578674},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2014.6908562","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908562","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1997582578","https://openalex.org/W2139463923","https://openalex.org/W2150007533","https://openalex.org/W2993567028"],"related_works":["https://openalex.org/W2165367082","https://openalex.org/W1972641423","https://openalex.org/W611446063","https://openalex.org/W1967064512","https://openalex.org/W2388299947","https://openalex.org/W2139737941","https://openalex.org/W2382673458","https://openalex.org/W2326041751","https://openalex.org/W1828239946","https://openalex.org/W2120080222"],"abstract_inverted_index":{"For":[0],"many":[1,21],"image":[2,41],"processing":[3,42],"systems,":[4],"the":[5,82,91,131],"computing":[6],"power":[7],"required":[8],"can":[9,84],"not":[10],"be":[11],"provided":[12],"by":[13],"a":[14,50,69,74,98,113],"single":[15],"sequential":[16],"processor,":[17],"this":[18],"is":[19,54,127],"why":[20],"designers":[22],"appeal":[23],"to":[24,49,61,129,139],"multiprocessor":[25],"systems":[26,47],"(parallelism).":[27],"This":[28,66],"article":[29],"proposes":[30],"an":[31],"original":[32],"flexible":[33,133],"MP-SoC":[34,71,134],"(Multi-Processors":[35],"System":[36],"on":[37,90,141],"Chip)":[38],"architecture":[39,142],"for":[40,97,112],"applications.":[43],"Developing":[44],"processors":[45],"network":[46,83],"tailored":[48],"particular":[51],"application":[52],"domain":[53],"critical":[55],"and":[56,109,137,148],"design-time":[57],"consuming":[58],"in":[59,104],"order":[60],"achieve":[62],"high-performance":[63],"customized":[64],"solutions.":[65],"paper":[67],"introduces":[68],"16-core":[70],"ASIC":[72,118],"with":[73],"software":[75],"configuration.":[76],"In":[77],"particular,":[78],"each":[79],"tile":[80],"of":[81,106,146],"configure":[85],"its":[86],"communication":[87],"links":[88],"depending":[89],"most":[92],"relevant":[93],"overall":[94],"parallelism":[95],"scheme":[96,145],"targeted":[99],"application.":[100],"Results":[101],"are":[102],"shown":[103],"term":[105],"power,":[107],"area":[108],"timing":[110,149],"performance":[111],"65":[114],"nm":[115],"CMOS":[116],"technology":[117],"design.":[119],"A":[120],"case":[121],"study":[122],"(grey":[123],"scale":[124],"histogram":[125],"analyzes)":[126],"presented":[128],"illustrate":[130],"proposed":[132],"design":[135],"methodology":[136],"enables":[138],"focus":[140],"exploration,":[143],"instantiated":[144],"parallelization":[147],"performance.":[150]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
