{"id":"https://openalex.org/W2328569955","doi":"https://doi.org/10.1109/mwscas.2014.6908523","title":"A 3.45&amp;#x2013;4.22 GHz PLL frequency synthesizer with constant loop bandwidth for WLAN applications","display_name":"A 3.45&amp;#x2013;4.22 GHz PLL frequency synthesizer with constant loop bandwidth for WLAN applications","publication_year":2014,"publication_date":"2014-08-01","ids":{"openalex":"https://openalex.org/W2328569955","doi":"https://doi.org/10.1109/mwscas.2014.6908523","mag":"2328569955"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2014.6908523","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908523","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100393806","display_name":"Xiaolong Liu","orcid":"https://orcid.org/0000-0001-6818-5417"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaolong Liu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101846633","display_name":"Lei Zhang","orcid":"https://orcid.org/0000-0003-3545-9439"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lei Zhang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100425409","display_name":"Li Zhang","orcid":"https://orcid.org/0000-0001-5776-4552"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Zhang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5118092688","display_name":"Yan Wang","orcid":"https://orcid.org/0009-0009-0503-4879"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yan Wang","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100433433","display_name":"Zhiping Yu","orcid":"https://orcid.org/0000-0001-8701-8438"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiping Yu","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"749","last_page":"752"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8948250412940979},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.8677290678024292},{"id":"https://openalex.org/keywords/varicap","display_name":"Varicap","score":0.8186940550804138},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.7193784713745117},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4501792788505554},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.44841140508651733},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.428943395614624},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.4222847819328308},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3787353038787842},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3739253878593445},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.37148815393447876},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3242604732513428},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.29361966252326965},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.25873056054115295},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.25755202770233154},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24177861213684082},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1912742555141449}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8948250412940979},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.8677290678024292},{"id":"https://openalex.org/C15485314","wikidata":"https://www.wikidata.org/wiki/Q467463","display_name":"Varicap","level":4,"score":0.8186940550804138},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.7193784713745117},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4501792788505554},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.44841140508651733},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.428943395614624},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.4222847819328308},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3787353038787842},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3739253878593445},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.37148815393447876},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3242604732513428},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.29361966252326965},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.25873056054115295},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.25755202770233154},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24177861213684082},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1912742555141449},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2014.6908523","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908523","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.800000011920929}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2012585882","https://openalex.org/W2099064239","https://openalex.org/W2117349646","https://openalex.org/W2125158984","https://openalex.org/W2131053965","https://openalex.org/W2158180061","https://openalex.org/W2159820023"],"related_works":["https://openalex.org/W2359366503","https://openalex.org/W2375072050","https://openalex.org/W2330020385","https://openalex.org/W1486070987","https://openalex.org/W2217043549","https://openalex.org/W2376731877","https://openalex.org/W1600405202","https://openalex.org/W2976219355","https://openalex.org/W3145870900","https://openalex.org/W2371350995"],"abstract_inverted_index":{"A":[0],"fully":[1],"integrated":[2],"phase-locked":[3],"loop":[4,23,82,102],"(PLL)":[5],"frequency":[6,30,90,107],"synthesizer":[7],"for":[8],"WLAN":[9],"applications":[10],"is":[11,38,53,65,84],"designed":[12],"in":[13,72,101],"a":[14,32,42,68,73,80],"0.13-\u03bcm":[15],"CMOS":[16],"process.":[17],"In":[18],"order":[19],"to":[20,40,56,111],"make":[21],"the":[22,27,49,60,87],"bandwidth":[24,83,103],"constant":[25,81],"across":[26],"whole":[28],"operating":[29,106],"range,":[31],"switched":[33],"varactor":[34],"array":[35],"based":[36],"LC-VCO":[37],"used":[39],"achieve":[41],"low":[43],"K":[44],"<sub":[45],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[46,129],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">VCO</sub>":[47],"variation,":[48],"charge":[50],"pump":[51],"current":[52],"programmed":[54],"proportional":[55],"division":[57],"ratio,":[58],"and":[59],"variation":[61,100],"on":[62],"LPF":[63],"resistance":[64,71],"cancelled":[66],"by":[67],"matched":[69],"reference":[70],"band-gap.":[74],"By":[75],"combination":[76],"of":[77,119,125],"these":[78],"techniques,":[79],"achieved":[85],"over":[86,104],"entire":[88],"output":[89],"range.":[91],"The":[92,114],"proposed":[93],"PLL":[94],"attains":[95],"less":[96],"than":[97],"\u00b1":[98],"4%":[99],"an":[105,123],"range":[108],"from":[109],"3.45":[110],"4.22":[112],"GHz.":[113],"chip":[115],"consumes":[116],"21.1":[117],"mW":[118],"power":[120],"while":[121],"occupying":[122],"area":[124],"0.88":[126],"mm":[127],"<sup":[128],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[130],".":[131]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
