{"id":"https://openalex.org/W1996347436","doi":"https://doi.org/10.1109/mwscas.2014.6908435","title":"Analog signal processing in deep submicron CMOS technologies using inverters","display_name":"Analog signal processing in deep submicron CMOS technologies using inverters","publication_year":2014,"publication_date":"2014-08-01","ids":{"openalex":"https://openalex.org/W1996347436","doi":"https://doi.org/10.1109/mwscas.2014.6908435","mag":"1996347436"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2014.6908435","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908435","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102765611","display_name":"K. R. Raghunandan","orcid":"https://orcid.org/0000-0002-2428-8542"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"K.R. Raghunandan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","University of Texas at Austin#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Texas at Austin#TAB#","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070329670","display_name":"Nan Sun","orcid":"https://orcid.org/0000-0002-5536-8385"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nan Sun","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","Dept. of Electrical and Computer Engineering, The University of Texas at Austin, 78712, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, The University of Texas at Austin, 78712, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010454235","display_name":"T.R. Viswanathan","orcid":"https://orcid.org/0000-0001-8277-3653"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T.R. Viswanathan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","Dept. of Electrical and Computer Engineering, The University of Texas at Austin, 78712, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, The University of Texas at Austin, 78712, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102765611"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.06862438,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"394","last_page":"397"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8059594631195068},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.6179150342941284},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6145153045654297},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5843524932861328},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.518490195274353},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5128858089447021},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.4741750955581665},{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.45949792861938477},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.45502880215644836},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4343729615211487},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4131571054458618},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3996514678001404},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3634917736053467},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.35150039196014404},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3023287355899811}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8059594631195068},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.6179150342941284},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6145153045654297},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5843524932861328},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.518490195274353},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5128858089447021},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.4741750955581665},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.45949792861938477},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.45502880215644836},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4343729615211487},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4131571054458618},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3996514678001404},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3634917736053467},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.35150039196014404},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3023287355899811},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2014.6908435","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908435","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.75}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2019714160","https://openalex.org/W2066597061","https://openalex.org/W2180407616","https://openalex.org/W2537128596"],"related_works":["https://openalex.org/W115888153","https://openalex.org/W1585429535","https://openalex.org/W2774445564","https://openalex.org/W2229324318","https://openalex.org/W1591963733","https://openalex.org/W2060224337","https://openalex.org/W1585320216","https://openalex.org/W2168466824","https://openalex.org/W4300617157","https://openalex.org/W4210925376"],"abstract_inverted_index":{"Analog":[0],"signal-processing":[1,66,94],"in":[2,111],"deep":[3],"sub-micron":[4],"technologies":[5],"poses":[6],"many":[7],"challenges":[8],"arising":[9],"from":[10],"both":[11],"low":[12],"supply":[13],"voltage":[14,82],"and":[15,72,83],"intrinsic":[16],"voltage-gain":[17],"of":[18,29,57,68,98],"short":[19],"channel":[20],"devices.":[21],"Class-AB":[22],"CMOS":[23,58,123],"transconductance":[24],"obtained":[25],"by":[26],"a":[27,33,96,112],"pair":[28],"complementary":[30],"transistors":[31],"is":[32,49],"widely":[34],"used":[35,76],"power":[36],"efficient":[37],"building":[38],"block":[39,62],"because":[40],"it":[41],"has":[42],"linear":[43],"v":[44],"-":[45],"i":[46],"characteristics.":[47],"This":[48,61,107],"topologically":[50],"the":[51,54,64,79],"same":[52],"as":[53],"logic":[55],"inverter":[56],"digital":[59],"systems.":[60,106],"enables":[63],"basic":[65],"operations":[67],"addition,":[69],"subtraction,":[70],"scaling":[71],"integration.":[73],"Replica-circuits":[74],"are":[75,125],"to":[77,127],"keep":[78],"large":[80],"process,":[81],"temperature":[84],"(PVT)":[85],"variations":[86],"under":[87],"control.":[88],"Thus":[89],"we":[90],"can":[91],"perform":[92],"analog":[93],"at":[95],"level":[97],"precision":[99],"required":[100],"for":[101,120],"designing":[102],"high-speed":[103],"data":[104],"communication":[105],"paper":[108],"discusses":[109],"this":[110],"canonical":[113],"fashion.":[114],"Simulation":[115],"results":[116],"using":[117],"device":[118],"models":[119],"65":[121],"nm":[122],"process":[124],"presented":[126],"validate":[128],"these":[129],"ideas.":[130]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}