{"id":"https://openalex.org/W2040701810","doi":"https://doi.org/10.1109/mwscas.2014.6908428","title":"Model-based synthesis for real-time embedded systems","display_name":"Model-based synthesis for real-time embedded systems","publication_year":2014,"publication_date":"2014-08-01","ids":{"openalex":"https://openalex.org/W2040701810","doi":"https://doi.org/10.1109/mwscas.2014.6908428","mag":"2040701810"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2014.6908428","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908428","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020896290","display_name":"Qi Zhu","orcid":"https://orcid.org/0000-0002-7700-4099"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Qi Zhu","raw_affiliation_strings":["Department of Electrical Engineering, University of California, Riverside","Dept. of Electrical Engineering, University of California, Riverside, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of California, Riverside","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, University of California, Riverside, USA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5020896290"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10771524,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"366","last_page":"369"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8020836114883423},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6079034805297852},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5701422691345215},{"id":"https://openalex.org/keywords/code-generation","display_name":"Code generation","score":0.552129864692688},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.5047043561935425},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.4825407862663269},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.47486162185668945},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45444971323013306},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.452101469039917},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.43865838646888733},{"id":"https://openalex.org/keywords/variety","display_name":"Variety (cybernetics)","score":0.4376674294471741},{"id":"https://openalex.org/keywords/model-based-design","display_name":"Model-based design","score":0.4217946231365204},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.4196528196334839},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41195225715637207},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.31258249282836914},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.22255510091781616},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.12762627005577087},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11259806156158447},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.10547292232513428}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8020836114883423},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6079034805297852},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5701422691345215},{"id":"https://openalex.org/C133162039","wikidata":"https://www.wikidata.org/wiki/Q1061077","display_name":"Code generation","level":3,"score":0.552129864692688},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.5047043561935425},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4825407862663269},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.47486162185668945},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45444971323013306},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.452101469039917},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.43865838646888733},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.4376674294471741},{"id":"https://openalex.org/C195672273","wikidata":"https://www.wikidata.org/wiki/Q6888132","display_name":"Model-based design","level":2,"score":0.4217946231365204},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.4196528196334839},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41195225715637207},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.31258249282836914},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.22255510091781616},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.12762627005577087},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11259806156158447},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.10547292232513428},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2014.6908428","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908428","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W87635799","https://openalex.org/W1969252399","https://openalex.org/W1994901326","https://openalex.org/W2016310205","https://openalex.org/W2017213820","https://openalex.org/W2035091557","https://openalex.org/W2048145195","https://openalex.org/W2089266152","https://openalex.org/W2096279841","https://openalex.org/W2110699536","https://openalex.org/W2131305885","https://openalex.org/W2156021445","https://openalex.org/W4232642394","https://openalex.org/W4234297325","https://openalex.org/W4243442048","https://openalex.org/W4250661686","https://openalex.org/W6603557143"],"related_works":["https://openalex.org/W2016926482","https://openalex.org/W2129671278","https://openalex.org/W2975035977","https://openalex.org/W4236014545","https://openalex.org/W2138506581","https://openalex.org/W2137359677","https://openalex.org/W2130241392","https://openalex.org/W2139939460","https://openalex.org/W2105824157","https://openalex.org/W2096525051"],"abstract_inverted_index":{"Model-based":[0],"design":[1,21,49,84,116,172],"is":[2,52,100],"being":[3],"increasingly":[4],"used":[5],"in":[6,31,134,161],"the":[7,32,39,86,97,131,178],"development":[8,71],"of":[9,41,72,147,171],"real-time":[10,90,140],"embedded":[11,91,141],"control":[12],"systems":[13,92],"due":[14],"to":[15,18,37,54,81],"its":[16],"capabilities":[17],"support":[19],"early":[20],"verification":[22],"and":[23,46,63,103,106,124,143,158,174,183],"validation":[24],"through":[25],"formal":[26],"functional":[27,44,68,87],"models.":[28,69],"Similarly":[29],"as":[30,119],"case":[33],"for":[34,89,139],"circuit":[35,83],"design,":[36],"facilitate":[38],"adoption":[40],"high":[42],"level":[43],"models":[45],"truly":[47],"reduce":[48],"complexity,":[50],"it":[51],"important":[53],"have":[55],"automated":[56],"synthesis":[57,74,137,150,166],"tools":[58,75,138],"that":[59,152],"can":[60],"generate":[61],"correct":[62],"optimal":[64],"implementations":[65],"from":[66],"those":[67],"The":[70,165],"such":[73,118],"has":[76,93],"some":[77],"unique":[78],"challenges":[79,133],"compared":[80],"synchronous":[82],"-":[85],"model":[88],"more":[94,101],"diverse":[95],"semantics,":[96],"implementation":[98],"platform":[99],"distributed":[102],"often":[104,109],"asynchronous,":[105],"there":[107],"are":[108],"strict":[110],"timing":[111],"requirements":[112],"along":[113],"with":[114],"various":[115],"objectives":[117,182],"system":[120],"performance,":[121],"safety,":[122],"security":[123],"extensibility.":[125],"In":[126],"this":[127],"paper,":[128],"we":[129,175],"discuss":[130],"major":[132],"developing":[135],"model-based":[136],"systems,":[142],"present":[144],"an":[145],"overview":[146],"our":[148],"integrated":[149],"flow":[151],"addresses":[153],"task":[154,156],"generation,":[155],"mapping,":[157],"code":[159],"generation":[160],"a":[162,169],"holistic":[163],"fashion.":[164],"process":[167],"considers":[168],"variety":[170],"objectives,":[173],"will":[176],"highlight":[177],"trade-off":[179],"between":[180],"timing-related":[181],"security.":[184]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
