{"id":"https://openalex.org/W2334528954","doi":"https://doi.org/10.1109/mwscas.2014.6908411","title":"Adaptive real-time DSP acceleration for SoC applications","display_name":"Adaptive real-time DSP acceleration for SoC applications","publication_year":2014,"publication_date":"2014-08-01","ids":{"openalex":"https://openalex.org/W2334528954","doi":"https://doi.org/10.1109/mwscas.2014.6908411","mag":"2334528954"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2014.6908411","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908411","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077751830","display_name":"Pascal Nsame","orcid":null},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Pascal Nsame","raw_affiliation_strings":["Computer Engineering and Electrical Engineering Dept., Polytechnique, Montreal, Canada"],"affiliations":[{"raw_affiliation_string":"Computer Engineering and Electrical Engineering Dept., Polytechnique, Montreal, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019163790","display_name":"Guy Bois","orcid":"https://orcid.org/0000-0002-7595-9975"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Guy Bois","raw_affiliation_strings":["Computer Engineering and Electrical Engineering Dept., Polytechnique, Montreal, Canada"],"affiliations":[{"raw_affiliation_string":"Computer Engineering and Electrical Engineering Dept., Polytechnique, Montreal, Canada","institution_ids":["https://openalex.org/I45683168"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038488044","display_name":"Yvon Savaria","orcid":"https://orcid.org/0000-0002-3404-9959"},"institutions":[{"id":"https://openalex.org/I45683168","display_name":"Polytechnique Montr\u00e9al","ror":"https://ror.org/05f8d4e86","country_code":"CA","type":"education","lineage":["https://openalex.org/I45683168"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Yvon Savaria","raw_affiliation_strings":["Computer Engineering and Electrical Engineering Dept., Polytechnique, Montreal, Canada"],"affiliations":[{"raw_affiliation_string":"Computer Engineering and Electrical Engineering Dept., Polytechnique, Montreal, Canada","institution_ids":["https://openalex.org/I45683168"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5077751830"],"corresponding_institution_ids":["https://openalex.org/I45683168"],"apc_list":null,"apc_paid":null,"fwci":0.2951,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61574947,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"47","issue":null,"first_page":"298","last_page":"301"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7949591875076294},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.741097092628479},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6945331692695618},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6313621401786804},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5634063482284546},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5449373722076416},{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.5087547898292542},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.4820328950881958},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4637176990509033},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4616711139678955},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.45888620615005493},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.45397093892097473},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42109215259552},{"id":"https://openalex.org/keywords/video-processing","display_name":"Video processing","score":0.4192770719528198},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36595529317855835},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.12407702207565308},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09378451108932495}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7949591875076294},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.741097092628479},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6945331692695618},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6313621401786804},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5634063482284546},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5449373722076416},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.5087547898292542},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.4820328950881958},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4637176990509033},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4616711139678955},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.45888620615005493},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.45397093892097473},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42109215259552},{"id":"https://openalex.org/C65483669","wikidata":"https://www.wikidata.org/wiki/Q3536669","display_name":"Video processing","level":2,"score":0.4192770719528198},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36595529317855835},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.12407702207565308},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09378451108932495},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mwscas.2014.6908411","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2014.6908411","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.polymtl.ca:39876","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/39876/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Communication de conf\u00e9rence"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1981542807","https://openalex.org/W2024355553","https://openalex.org/W2059625290","https://openalex.org/W2069308200","https://openalex.org/W2083198460","https://openalex.org/W2122086266","https://openalex.org/W2135252045"],"related_works":["https://openalex.org/W1916685473","https://openalex.org/W2055682261","https://openalex.org/W2186390138","https://openalex.org/W1993363272","https://openalex.org/W2060035984","https://openalex.org/W2790129917","https://openalex.org/W2992856432","https://openalex.org/W2100638064","https://openalex.org/W2174937762","https://openalex.org/W2356859146"],"abstract_inverted_index":{"This":[0],"paper":[1],"investigates":[2],"VLSI":[3],"architectures":[4],"for":[5,18,50,54,64,70,87,142],"digital":[6],"processing":[7,119],"(DSP)":[8],"functions":[9],"amenable":[10],"to":[11,43],"low":[12],"energy":[13],"operation":[14],"with":[15,93,117],"scalable":[16,95],"performance":[17,46,122],"H.265":[19,143],"high":[20],"efficiency":[21],"video":[22],"coding":[23],"(HEVC)":[24],"applications.":[25,145],"First,":[26],"we":[27,38],"describe":[28],"and":[29,90,102,112,123,139],"experimentally":[30,78],"evaluate":[31],"a":[32,94,108,130],"novel":[33],"adaptive":[34],"computing":[35,83],"fabric.":[36],"Second,":[37],"propose":[39],"an":[40],"energy-efficient":[41],"method":[42],"scale":[44],"the":[45,48,67,81,100,105,137],"of":[47,62,104,136],"fabric":[49,84,106],"large":[51],"images":[52],"or":[53],"meeting":[55],"stringent":[56],"real-time":[57],"computation":[58],"requirements.":[59],"A":[60],"series":[61],"tradeoffs":[63],"exploiting":[65],"efficiently":[66],"application":[68],"space":[69],"general":[71],"purpose":[72],"DSP":[73],"acceleration":[74,92],"are":[75],"proposed.":[76],"We":[77,97],"show":[79,113],"how":[80,114],"proposed":[82],"is":[85],"reusable":[86],"Filters,":[88],"FFT":[89],"DCT":[91],"throughput.":[96],"report":[98],"on":[99,107],"design":[101],"implementation":[103],"Xilinx":[109],"FPGA":[110,127],"device":[111],"regulated-parallelism":[115],"augmented":[116],"in-memory":[118],"techniques":[120],"impact":[121],"power":[124],"efficiency.":[125],"The":[126],"prototype":[128],"demonstrates":[129],"sustained":[131],"throughput":[132],"exceeding":[133],"10Gbps":[134],"irrespective":[135],"kernel":[138],"image":[140],"size":[141],"HEVC":[144]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}