{"id":"https://openalex.org/W2028295763","doi":"https://doi.org/10.1109/mwscas.2013.6674628","title":"An analog-design assistant tool and an example of its application","display_name":"An analog-design assistant tool and an example of its application","publication_year":2013,"publication_date":"2013-08-01","ids":{"openalex":"https://openalex.org/W2028295763","doi":"https://doi.org/10.1109/mwscas.2013.6674628","mag":"2028295763"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2013.6674628","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2013.6674628","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072095484","display_name":"Delaram Shahhosseini","orcid":"https://orcid.org/0000-0002-0341-0908"},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Delaram Shahhosseini","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Canada","Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111878365","display_name":"M. Hossein Taghavi","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"M. Hossein Taghavi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Canada","Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080379451","display_name":"Laleh Behjat","orcid":"https://orcid.org/0000-0002-8122-0990"},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Laleh Behjat","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Canada","Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025866057","display_name":"Leonid Belostotski","orcid":"https://orcid.org/0000-0002-5228-6907"},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Leonid Belostotski","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, Canada","Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada","institution_ids":["https://openalex.org/I168635309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I168635309"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"233","last_page":"236"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6444438695907593},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6269542574882507},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6235172748565674},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.5557010769844055},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5554140210151672},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.516089141368866},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5053420662879944},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4944796562194824},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4930209815502167},{"id":"https://openalex.org/keywords/transistor-model","display_name":"Transistor model","score":0.4835969805717468},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.47857049107551575},{"id":"https://openalex.org/keywords/output-impedance","display_name":"Output impedance","score":0.4370403587818146},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.431633323431015},{"id":"https://openalex.org/keywords/electronic-circuit-simulation","display_name":"Electronic circuit simulation","score":0.42772701382637024},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.370958149433136},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.34569329023361206},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2587832510471344},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11765554547309875}],"concepts":[{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6444438695907593},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6269542574882507},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6235172748565674},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.5557010769844055},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5554140210151672},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.516089141368866},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5053420662879944},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4944796562194824},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4930209815502167},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.4835969805717468},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.47857049107551575},{"id":"https://openalex.org/C58112919","wikidata":"https://www.wikidata.org/wiki/Q631203","display_name":"Output impedance","level":3,"score":0.4370403587818146},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.431633323431015},{"id":"https://openalex.org/C46205389","wikidata":"https://www.wikidata.org/wiki/Q1270401","display_name":"Electronic circuit simulation","level":3,"score":0.42772701382637024},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.370958149433136},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.34569329023361206},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2587832510471344},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11765554547309875},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2013.6674628","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2013.6674628","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W1974088923","https://openalex.org/W2013070945","https://openalex.org/W2017506843","https://openalex.org/W2050563754","https://openalex.org/W2096255496","https://openalex.org/W2121456807","https://openalex.org/W2158776248","https://openalex.org/W4229859960"],"related_works":["https://openalex.org/W2499505660","https://openalex.org/W2167327848","https://openalex.org/W4244211680","https://openalex.org/W2561828749","https://openalex.org/W3166315890","https://openalex.org/W4249015575","https://openalex.org/W2120134802","https://openalex.org/W2182902953","https://openalex.org/W3138123758","https://openalex.org/W2137147970"],"abstract_inverted_index":{"In":[0,82],"this":[1],"paper,":[2],"we":[3],"introduce":[4],"an":[5,47],"analog-design":[6],"assistant":[7],"tool":[8],"(ADA),":[9],"which":[10],"was":[11,123],"used":[12,103],"to":[13,25,43,77,104,159],"generate":[14],"a":[15,70,110,116,130],"database":[16],"of":[17,49,52,59,62,80,88,120,162,169],"56,280":[18],"three-MOSFET":[19,35],"circuit":[20,55,145],"topologies.":[21],"Having":[22],"setup":[23],"ADA":[24,50,84,100,149,155],"provide":[26,165],"analog":[27],"designers":[28,158],"with":[29,54,115,139,167],"amplifier":[30,64,114],"topologies,":[31],"it":[32],"identified":[33],"5,103":[34],"amplifiers":[36],"based":[37],"on":[38],"the":[39,44,57,60,144],"selection":[40],"criteria":[41],"given":[42],"software.":[45],"As":[46],"illustration":[48],"capability":[51],"helping":[53],"optimization,":[56],"transconductances":[58],"transistors":[61],"each":[63],"are":[65,172],"automatically":[66],"optimized":[67],"by":[68,148],"solving":[69],"nonlinear":[71],"optimization":[72],"problem":[73],"that":[74,99,143,171],"is":[75,150],"set":[76],"maximize":[78],"gains":[79],"circuits.":[81],"addition,":[83],"provides":[85],"closed-form":[86],"expressions":[87],"gain,":[89],"input":[90],"impedance,":[91],"output":[92],"impedance":[93],"and":[94,106,126,152,164],"reverse":[95],"gain.":[96],"To":[97],"demonstrate":[98],"can":[101],"be":[102],"identify":[105],"optimize":[107],"new":[108],"circuits,":[109],"previously":[111],"unknown":[112],"three-transistor":[113],"high":[117],"DC":[118],"gain":[119],"~40":[121],"dB":[122],"randomly":[124],"chosen":[125],"fully":[127],"designed":[128],"in":[129],"0.13-\u03bcm":[131],"standard":[132],"CMOS":[133],"technology.":[134],"The":[135],"simulation":[136],"results":[137],"obtained":[138],"BSIM":[140],"models":[141],"show":[142],"topology":[146],"provided":[147],"accurate":[151],"realizable.":[153],"Using":[154],"will":[156],"enable":[157],"save":[160],"hours":[161],"time":[163],"them":[166],"range":[168],"circuits":[170],"customized":[173],"for":[174],"their":[175],"need.":[176]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}