{"id":"https://openalex.org/W1985856537","doi":"https://doi.org/10.1109/mwscas.2013.6674614","title":"Double gate FinFET based mixed-signal design: A VCO case study","display_name":"Double gate FinFET based mixed-signal design: A VCO case study","publication_year":2013,"publication_date":"2013-08-01","ids":{"openalex":"https://openalex.org/W1985856537","doi":"https://doi.org/10.1109/mwscas.2013.6674614","mag":"1985856537"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2013.6674614","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2013.6674614","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065315664","display_name":"Dhruva Ghai","orcid":"https://orcid.org/0000-0002-8204-6330"},"institutions":[{"id":"https://openalex.org/I4210100725","display_name":"Oriental University","ror":"https://ror.org/012jgbk51","country_code":"RU","type":"education","lineage":["https://openalex.org/I4210100725"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"Dhruva Ghai","raw_affiliation_strings":["Dept. of Electronics and Communication Engineering, Oriental University, Indore","Dept. of Electron. & Commun. Eng., Oriental Univ., Indore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electronics and Communication Engineering, Oriental University, Indore","institution_ids":["https://openalex.org/I4210100725"]},{"raw_affiliation_string":"Dept. of Electron. & Commun. Eng., Oriental Univ., Indore, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070359867","display_name":"Saraju P. Mohanty","orcid":"https://orcid.org/0000-0003-2959-6541"},"institutions":[{"id":"https://openalex.org/I123534392","display_name":"University of North Texas","ror":"https://ror.org/00v97ad02","country_code":"US","type":"education","lineage":["https://openalex.org/I123534392"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saraju P. Mohanty","raw_affiliation_strings":["Dept. of Computer Science and Engineering, University of North Texas, USA","Department of Computer Science and Engineering University of North Texas Denton, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, University of North Texas, USA","institution_ids":["https://openalex.org/I123534392"]},{"raw_affiliation_string":"Department of Computer Science and Engineering University of North Texas Denton, TX, USA","institution_ids":["https://openalex.org/I123534392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008702299","display_name":"Garima Thakral","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100725","display_name":"Oriental University","ror":"https://ror.org/012jgbk51","country_code":"RU","type":"education","lineage":["https://openalex.org/I4210100725"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"Garima Thakral","raw_affiliation_strings":["Dept. of Computer Science, Oriental University, Indore","Dept. of Comput. Sci., Oriental Univ., Indore, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science, Oriental University, Indore","institution_ids":["https://openalex.org/I4210100725"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Oriental Univ., Indore, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.1433,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.90540297,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"177","last_page":"180"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.9664620161056519},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6561360359191895},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5655811429023743},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.4731510877609253},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4645193815231323},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41990673542022705},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3896683156490326},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.348522812128067}],"concepts":[{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.9664620161056519},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6561360359191895},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5655811429023743},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.4731510877609253},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4645193815231323},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41990673542022705},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3896683156490326},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.348522812128067},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2013.6674614","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2013.6674614","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2024874287","https://openalex.org/W2033700531","https://openalex.org/W2079163915","https://openalex.org/W2091893572","https://openalex.org/W2112090850","https://openalex.org/W2130249349","https://openalex.org/W2145474418","https://openalex.org/W2149515435","https://openalex.org/W2150368362","https://openalex.org/W2166386585","https://openalex.org/W2296008058","https://openalex.org/W4235784435","https://openalex.org/W6676507221","https://openalex.org/W6684139164"],"related_works":["https://openalex.org/W2070109416","https://openalex.org/W1523213765","https://openalex.org/W2040399070","https://openalex.org/W2388316590","https://openalex.org/W4388486464","https://openalex.org/W2380576078","https://openalex.org/W2198645257","https://openalex.org/W67296738","https://openalex.org/W2109445684","https://openalex.org/W2081082331"],"abstract_inverted_index":{"This":[0],"paper":[1,106],"investigates":[2],"mixed-signal":[3],"design":[4,93,116],"for":[5,45,71,82,91,112],"double-gate":[6],"(DG)":[7],"FinFET":[8,41,66,110,126],"technology":[9,111],"using":[10],"a":[11,18,31,35,119],"current-starved":[12],"voltage":[13],"controlled":[14],"oscillator":[15],"(VCO)":[16],"as":[17],"case":[19],"study.":[20],"Design":[21],"issues":[22],"of":[23,98],"the":[24,46,62,72,83,96,99,104],"DG":[25,40,65,109,125],"FinFET-based":[26,84],"VCO":[27,42],"is":[28,43,58,103],"presented":[29,59,81],"in":[30,64],"comparative":[32,120],"perspective":[33],"with":[34],"classical":[36,122],"CMOS":[37,123],"VCO.":[38,67,85],"The":[39,86],"analyzed":[44],"figures-of-merit":[47],"like":[48],"center":[49],"frequency,":[50],"frequency-voltage":[51],"(f-v)":[52],"characteristics.":[53],"Statistical":[54],"process":[55],"variation":[56],"analysis":[57],"to":[60],"study":[61],"variability":[63],"Models":[68],"are":[69],"investigated":[70],"f-v":[73],"characteristics":[74],"and":[75,124],"width":[76],"quantization-aware":[77],"modeling":[78],"has":[79],"been":[80],"models":[87],"can":[88],"be":[89],"used":[90],"fast":[92],"optimization.":[94],"To":[95],"best":[97],"authors'":[100],"knowledge,":[101],"this":[102],"first":[105],"that":[107],"examines":[108],"circuit-level":[113],"mixed":[114],"signal":[115],"while":[117],"presenting":[118],"between":[121],"technologies.":[127]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
