{"id":"https://openalex.org/W2074265661","doi":"https://doi.org/10.1109/mwscas.2013.6674576","title":"A power-efficient asynchronous circuit style with selective input-channel restoring","display_name":"A power-efficient asynchronous circuit style with selective input-channel restoring","publication_year":2013,"publication_date":"2013-08-01","ids":{"openalex":"https://openalex.org/W2074265661","doi":"https://doi.org/10.1109/mwscas.2013.6674576","mag":"2074265661"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2013.6674576","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2013.6674576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063008784","display_name":"Chin-Khai Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chin-Khai Tang","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan#TAB#","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040956103","display_name":"Yi-Chang Lu","orcid":"https://orcid.org/0000-0002-7638-0367"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Chang Lu","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan#TAB#","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20245865,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2010","issue":null,"first_page":"25","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.864134669303894},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.829791784286499},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.674953281879425},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5523663759231567},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5045541524887085},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48593416810035706},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.4792211651802063},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4568080008029938},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.44481465220451355},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.41349542140960693},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.41130921244621277},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3651619553565979},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.30049633979797363},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.2657005488872528},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20585346221923828},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15817928314208984},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.135210782289505},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11820709705352783},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09757441282272339},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08240184187889099}],"concepts":[{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.864134669303894},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.829791784286499},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.674953281879425},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5523663759231567},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5045541524887085},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48593416810035706},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.4792211651802063},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4568080008029938},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.44481465220451355},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.41349542140960693},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.41130921244621277},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3651619553565979},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.30049633979797363},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.2657005488872528},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20585346221923828},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15817928314208984},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.135210782289505},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11820709705352783},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09757441282272339},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08240184187889099},{"id":"https://openalex.org/C147789679","wikidata":"https://www.wikidata.org/wiki/Q11372","display_name":"Physical chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2013.6674576","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2013.6674576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W270615609","https://openalex.org/W1997193388","https://openalex.org/W2108964809","https://openalex.org/W2136922322","https://openalex.org/W2158099759","https://openalex.org/W4251296695","https://openalex.org/W6649951061","https://openalex.org/W6683302477"],"related_works":["https://openalex.org/W364924225","https://openalex.org/W1993985975","https://openalex.org/W2093992207","https://openalex.org/W2384756109","https://openalex.org/W2590986178","https://openalex.org/W4312516786","https://openalex.org/W2617270062","https://openalex.org/W1502478103","https://openalex.org/W2237508561","https://openalex.org/W1764013880"],"abstract_inverted_index":{"A":[0],"new":[1,14,70,83],"power":[2,54,89],"efficient":[3],"asynchronous":[4,36,71,84],"circuit":[5,53,72,85],"design":[6,86],"is":[7],"presented":[8],"in":[9,34],"this":[10],"paper.":[11],"By":[12],"using":[13],"input":[15,28],"channel":[16],"restoring":[17],"circuits":[18],"and":[19,40,91],"function":[20,38],"block":[21],"partitioning":[22],"technique":[23],"to":[24,66],"restore":[25],"only":[26],"asserted":[27],"channels,":[29],"the":[30,42,52,69,82],"transistor":[31],"area":[32,92],"used":[33],"each":[35],"logic":[37],"unit":[39],"thus":[41],"load":[43],"capacitance":[44],"can":[45,56,94],"be":[46,57,95],"effectively":[47],"minimized.":[48],"As":[49],"a":[50],"result,":[51],"consumption":[55,90],"reduced.":[58],"Our":[59],"simulation":[60],"results":[61],"show":[62],"that,":[63],"when":[64],"compared":[65],"STFB":[67],"circuits,":[68],"consumes":[73],"at":[74],"least":[75],"26%":[76],"less":[77],"power.":[78],"Thus,":[79],"by":[80],"applying":[81],"technique,":[87],"low":[88],"usage":[93],"achieved.":[96]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
