{"id":"https://openalex.org/W1976439278","doi":"https://doi.org/10.1109/mwscas.2012.6292088","title":"Non-idealities in analog circuits design: What does it really mean?","display_name":"Non-idealities in analog circuits design: What does it really mean?","publication_year":2012,"publication_date":"2012-08-01","ids":{"openalex":"https://openalex.org/W1976439278","doi":"https://doi.org/10.1109/mwscas.2012.6292088","mag":"1976439278"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2012.6292088","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2012.6292088","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083618787","display_name":"L. Guerrero-Linares","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"L. Guerrero-Linares","raw_affiliation_strings":["Centro de Ense\u00f1anza T\u00e9cnica Industrial, CETI, Guadalajara, Mexico","Centro de Ense\u00f1anza T\u00e9cnica Industrial, CETI, Guadalajara, MEXICO"],"affiliations":[{"raw_affiliation_string":"Centro de Ense\u00f1anza T\u00e9cnica Industrial, CETI, Guadalajara, Mexico","institution_ids":[]},{"raw_affiliation_string":"Centro de Ense\u00f1anza T\u00e9cnica Industrial, CETI, Guadalajara, MEXICO","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016794649","display_name":"F. Sandoval\u2010Ibarra","orcid":"https://orcid.org/0000-0003-3073-2870"},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Center for Research and Advanced Studies of the National Polytechnic Institute","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"F. Sandoval-Ibarra","raw_affiliation_strings":["Centro de Ense\u00f1anza T\u00e9cnica Industrial, CETI, Guadalajara, Mexico","Cinvestav-Guadalajara Unit, Zapopan, MEXICO"],"affiliations":[{"raw_affiliation_string":"Centro de Ense\u00f1anza T\u00e9cnica Industrial, CETI, Guadalajara, Mexico","institution_ids":[]},{"raw_affiliation_string":"Cinvestav-Guadalajara Unit, Zapopan, MEXICO","institution_ids":["https://openalex.org/I68368234"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060871491","display_name":"J. R. Loo\u2010Yau","orcid":"https://orcid.org/0000-0001-7467-2537"},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Center for Research and Advanced Studies of the National Polytechnic Institute","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"J. R. Loo-Yau","raw_affiliation_strings":["Cinvestav-Guadalajara Unit, Zapopan, Mexico","Cinvestav-Guadalajara Unit, Zapopan, MEXICO"],"affiliations":[{"raw_affiliation_string":"Cinvestav-Guadalajara Unit, Zapopan, Mexico","institution_ids":["https://openalex.org/I68368234"]},{"raw_affiliation_string":"Cinvestav-Guadalajara Unit, Zapopan, MEXICO","institution_ids":["https://openalex.org/I68368234"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5083618787"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2017,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53591228,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"75","issue":null,"first_page":"586","last_page":"589"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.6531651616096497},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5957796573638916},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5903964042663574},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.5631323456764221},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5235511660575867},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5083221793174744},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47651445865631104},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.41920068860054016},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3046039938926697},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21600878238677979}],"concepts":[{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.6531651616096497},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5957796573638916},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5903964042663574},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.5631323456764221},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5235511660575867},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5083221793174744},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47651445865631104},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.41920068860054016},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3046039938926697},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21600878238677979},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2012.6292088","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2012.6292088","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1936884935","https://openalex.org/W2025417706","https://openalex.org/W2033168046","https://openalex.org/W2036062301","https://openalex.org/W2038462420","https://openalex.org/W2050253948","https://openalex.org/W2101453707","https://openalex.org/W2113320865","https://openalex.org/W2121468102","https://openalex.org/W2122965295","https://openalex.org/W2126159071","https://openalex.org/W2127905736","https://openalex.org/W2138591764","https://openalex.org/W2140281076","https://openalex.org/W2152881152","https://openalex.org/W2163779105","https://openalex.org/W2163854489","https://openalex.org/W2566193534","https://openalex.org/W4252131512"],"related_works":["https://openalex.org/W4389672975","https://openalex.org/W1965232212","https://openalex.org/W2109207559","https://openalex.org/W1987513258","https://openalex.org/W1963851171","https://openalex.org/W2098316714","https://openalex.org/W2134664711","https://openalex.org/W1974416117","https://openalex.org/W1976439278","https://openalex.org/W2159651504"],"abstract_inverted_index":{"The":[0],"aim":[1],"of":[2,10,16,26,55,60,77,119,135],"this":[3,83],"contribution":[4],"is":[5,31,65,97,154,177],"to":[6,20,41,112,146,210,214],"show":[7],"why":[8],"sources":[9,118],"non-idealities":[11,56,78,87,107,120,144],"are":[12,108],"actually":[13],"a":[14,43,69,100,155,202],"concept":[15],"reason":[17],"in":[18,23,57,89,99,103,110,149,185],"order":[19,111],"define":[21],"tradeoffs":[22],"the":[24,53,58,74,80,133,136,139,211],"design":[25,59,115,153,176,189,194,204,217,227],"analog":[27,95,151,171,175],"circuits.":[28],"A":[29],"tradeoff":[30],"commonly":[32,66],"picked":[33],"up":[34],"from":[35],"an":[36,150,181],"analytical":[37],"design-model,":[38],"which":[39,104],"tries":[40],"explain":[42],"given":[44],"phenomenon":[45],"under":[46],"study":[47],"by":[48,159],"using":[49],"physical":[50,186],"theories":[51],"underlying":[52],"role":[54],"accurate":[61,193],"analog-circuits.":[62],"Since":[63],"accuracy":[64],"used":[67],"as":[68],"measure":[70],"rule":[71],"for":[72],"minimizing":[73],"unwanted":[75],"effect":[76],"on":[79],"circuit":[81,96,152,172],"performance,":[82],"paper":[84,163],"underlines":[85],"that":[86,93],"reported":[88],"open":[90,167],"literature":[91],"shown":[92],"any":[94],"designed":[98],"custom":[101],"way,":[102],"just":[105,129],"some":[106],"minimized":[109,148],"fulfill":[113],"specific":[114],"specifications,":[116],"i.e.":[117],"do":[121],"not":[122,178,191],"necessarily":[123],"include":[124,215],"all":[125],"existing":[126],"ones":[127],"but":[128,180,200],"those":[130],"affecting":[131],"-according":[132],"experience":[134],"designer":[137,213],"-":[138],"circuit's":[140],"performance.":[141],"Thus,":[142],"what":[143],"have":[145],"be":[147],"question":[156],"usually":[157],"answered":[158],"reachable":[160],"tradeoffs.":[161],"This":[162],"addresses":[164],"difficulties":[165],"(i.e.":[166],"problems)":[168],"about":[169],"silicon-based":[170],"design.":[173],"So,":[174],"art,":[179],"engineering":[182],"activity":[183],"supported":[184],"theories.":[187],"Analog":[188],"demands":[190],"only":[192],"models,":[195],"and":[196,219,223],"suitable":[197],"simulation":[198],"tools,":[199],"also":[201,224],"well-defined":[203],"methodology,":[205],"elsewhere":[206],"trial-and-error":[207],"practices":[208],"force":[209],"analog-circuit":[212],"substantial":[216],"margin":[218],"risk":[220],"yield":[221],"loss,":[222],"provide":[225],"little":[226],"knowledge.":[228]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}