{"id":"https://openalex.org/W2039421256","doi":"https://doi.org/10.1109/mwscas.2012.6291984","title":"Configurable logic block (CLB) design for Asynchronous Nanowire Crossbar system","display_name":"Configurable logic block (CLB) design for Asynchronous Nanowire Crossbar system","publication_year":2012,"publication_date":"2012-08-01","ids":{"openalex":"https://openalex.org/W2039421256","doi":"https://doi.org/10.1109/mwscas.2012.6291984","mag":"2039421256"},"language":"en","primary_location":{"id":"doi:10.1109/mwscas.2012.6291984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2012.6291984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075806425","display_name":"Jun Wu","orcid":"https://orcid.org/0000-0001-7090-8653"},"institutions":[{"id":"https://openalex.org/I20382870","display_name":"Missouri University of Science and Technology","ror":"https://ror.org/00scwqd12","country_code":"US","type":"education","lineage":["https://openalex.org/I20382870"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jun Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, MO, USA","Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, 65409 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, MO, USA","institution_ids":["https://openalex.org/I20382870"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, 65409 USA","institution_ids":["https://openalex.org/I20382870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102913838","display_name":"Yong-Bin Kim","orcid":"https://orcid.org/0000-0002-7014-5630"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yong-Bin Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","Department of Electrical and Computer Engineering Northeastern University Boston MA 02115 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering Northeastern University Boston MA 02115 USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102967917","display_name":"Minsu Choi","orcid":"https://orcid.org/0000-0002-9104-0563"},"institutions":[{"id":"https://openalex.org/I20382870","display_name":"Missouri University of Science and Technology","ror":"https://ror.org/00scwqd12","country_code":"US","type":"education","lineage":["https://openalex.org/I20382870"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Minsu Choi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, MO, USA","Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, 65409 USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, MO, USA","institution_ids":["https://openalex.org/I20382870"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, 65409 USA","institution_ids":["https://openalex.org/I20382870"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5075806425"],"corresponding_institution_ids":["https://openalex.org/I20382870"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10253137,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"289","issue":null,"first_page":"170","last_page":"173"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.6877018809318542},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6738788485527039},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.562931478023529},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5238444805145264},{"id":"https://openalex.org/keywords/nondeterministic-algorithm","display_name":"Nondeterministic algorithm","score":0.5204222798347473},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5203380584716797},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.505847692489624},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4898490607738495},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.4828525185585022},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.4435841739177704},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.43931108713150024},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.431755930185318},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.42592233419418335},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.42366015911102295},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.37418776750564575},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.36342138051986694},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.346562922000885},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.15119770169258118},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11518844962120056}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.6877018809318542},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6738788485527039},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.562931478023529},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5238444805145264},{"id":"https://openalex.org/C176181172","wikidata":"https://www.wikidata.org/wiki/Q3490301","display_name":"Nondeterministic algorithm","level":2,"score":0.5204222798347473},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5203380584716797},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.505847692489624},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4898490607738495},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.4828525185585022},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.4435841739177704},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.43931108713150024},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.431755930185318},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.42592233419418335},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.42366015911102295},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.37418776750564575},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.36342138051986694},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.346562922000885},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.15119770169258118},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11518844962120056},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mwscas.2012.6291984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mwscas.2012.6291984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1983404403","https://openalex.org/W2019219628","https://openalex.org/W2081240624","https://openalex.org/W2097424177","https://openalex.org/W2111200700","https://openalex.org/W2117579197","https://openalex.org/W2147004330","https://openalex.org/W2166095336"],"related_works":["https://openalex.org/W2135636985","https://openalex.org/W3023652529","https://openalex.org/W2480852620","https://openalex.org/W2182398074","https://openalex.org/W2071567894","https://openalex.org/W2167086449","https://openalex.org/W4237841534","https://openalex.org/W2246445978","https://openalex.org/W2139569078","https://openalex.org/W2477544739"],"abstract_inverted_index":{"In":[0,88],"this":[1],"work,":[2],"a":[3,31,97],"novel":[4],"design":[5],"and":[6,48,73,94,115,119],"optimization":[7],"method":[8],"for":[9,102],"programmable":[10],"gate":[11],"macro":[12],"blocks":[13],"(PGMB)":[14],"in":[15,79],"the":[16,37],"newly":[17],"proposed":[18,65],"Asynchronous":[19],"Nanowire":[20],"Reconfigurable":[21],"Crossbar":[22],"Architecture":[23],"(ANRCA)":[24],"is":[25,28,44,67,104],"presented.":[26],"ANRCA":[27,103],"based":[29],"on":[30],"self-timed":[32],"logic":[33,109],"referred":[34],"to":[35,56,69,83,90],"as":[36],"Null":[38],"Convention":[39],"Logic":[40],"(NCL).":[41],"Since":[42],"there":[43],"no":[45],"global":[46],"clocking":[47],"clock":[49],"distribution":[50],"network,":[51],"all":[52],"failure":[53],"modes":[54],"related":[55],"timing":[57],"will":[58],"be":[59],"either":[60],"eliminated":[61],"or":[62],"relaxed.":[63],"The":[64],"architecture":[66,101],"anticipated":[68],"have":[70,112],"higher":[71],"manufacturability":[72],"robustness":[74],"that":[75],"are":[76,122],"critical":[77],"factors":[78],"nanoscale":[80],"systems":[81],"due":[82],"nondeterministic":[84],"nature":[85],"of":[86],"nanoassembly.":[87],"order":[89],"facilitate":[91],"efficient":[92],"programming":[93,118],"flexible":[95],"reconfiguration,":[96],"new":[98],"hierarchical":[99],"reconfigurable":[100],"also":[105,116],"proposed.":[106],"Various":[107],"configurable":[108],"block":[110],"structures":[111],"been":[113],"considered":[114],"their":[117],"reconfiguration":[120],"issues":[121],"discussed.":[123]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
