{"id":"https://openalex.org/W1881467540","doi":"https://doi.org/10.1109/mtv.2003.1250260","title":"A methodology for validating manufacturing test vector suites for custom designed scan-based circuits","display_name":"A methodology for validating manufacturing test vector suites for custom designed scan-based circuits","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W1881467540","doi":"https://doi.org/10.1109/mtv.2003.1250260","mag":"1881467540"},"language":"en","primary_location":{"id":"doi:10.1109/mtv.2003.1250260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mtv.2003.1250260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 4th International Workshop on Microprocessor Test and Verification - Common Challenges and Solutions","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108510816","display_name":"Jayanta Bhadra","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jayanta Bhadra","raw_affiliation_strings":["Motorola, Inc., USA"],"affiliations":[{"raw_affiliation_string":"Motorola, Inc., USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112415263","display_name":"Narayanan Krishnamurthy","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Narayanan Krishnamurthy","raw_affiliation_strings":["Motorola, Inc., USA"],"affiliations":[{"raw_affiliation_string":"Motorola, Inc., USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011349515","display_name":"Magdy S. Abadir","orcid":"https://orcid.org/0000-0003-4046-2472"},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Magdy Abadir","raw_affiliation_strings":["Motorola, Inc., USA"],"affiliations":[{"raw_affiliation_string":"Motorola, Inc., USA","institution_ids":["https://openalex.org/I1333370159"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5108510816"],"corresponding_institution_ids":["https://openalex.org/I1333370159"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09447997,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"32","last_page":"37"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9886999726295471,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.8552742600440979},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6277626752853394},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5476160049438477},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5270129442214966},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.5253055691719055},{"id":"https://openalex.org/keywords/test-vector","display_name":"Test vector","score":0.5163108706474304},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5032922625541687},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4622713029384613},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45007139444351196},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4104546308517456},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3757295310497284},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3618224859237671},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.3024788498878479},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3013727068901062},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15463802218437195},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13474619388580322},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08995908498764038}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.8552742600440979},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6277626752853394},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5476160049438477},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5270129442214966},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.5253055691719055},{"id":"https://openalex.org/C100767440","wikidata":"https://www.wikidata.org/wiki/Q7705816","display_name":"Test vector","level":3,"score":0.5163108706474304},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5032922625541687},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4622713029384613},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45007139444351196},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4104546308517456},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3757295310497284},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3618224859237671},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.3024788498878479},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3013727068901062},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15463802218437195},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13474619388580322},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08995908498764038},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mtv.2003.1250260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mtv.2003.1250260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 4th International Workshop on Microprocessor Test and Verification - Common Challenges and Solutions","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1592970915","https://openalex.org/W1866896089","https://openalex.org/W1956149407","https://openalex.org/W1972403558","https://openalex.org/W2044621917","https://openalex.org/W2151940902","https://openalex.org/W6661665413","https://openalex.org/W6720552070","https://openalex.org/W7039449111"],"related_works":["https://openalex.org/W2157212570","https://openalex.org/W2144004661","https://openalex.org/W1588361197","https://openalex.org/W2162370517","https://openalex.org/W2341817401","https://openalex.org/W2134369540","https://openalex.org/W2799101079","https://openalex.org/W2914961374","https://openalex.org/W1493811107","https://openalex.org/W2128148266"],"abstract_inverted_index":{"In":[0],"Motorola's":[1],"High":[2],"Performance":[3],"Design":[4],"Center,":[5],"two":[6,37,70],"verification":[7,71],"flows":[8,38,72],"are":[9,39],"often":[10,40],"used":[11],"to":[12,54,59,84],"verify":[13],"correctness":[14,76],"of":[15,77,107,111],"custom":[16,108],"designed":[17,109],"blocks.":[18],"The":[19,36],"first":[20],"is":[21,29,53],"an":[22],"equivalence":[23],"checking":[24],"flow,":[25],"and":[26,58],"the":[27,56,66,69,75],"second":[28],"a":[30,62,105,112],"manufacturing":[31,47,78],"test":[32,48,79],"pattern":[33],"generation/simulation":[34],"flow.":[35],"disconnected":[41],"resulting":[42],"into":[43],"silicon":[44,91],"failures":[45],"on":[46,89],"vector":[49],"suites.":[50],"Our":[51,99],"aim":[52],"analyze":[55],"disconnect":[57],"arrive":[60],"at":[61],"technique":[63],"that":[64],"bridges":[65],"gap":[67],"between":[68],"by":[73,86,94],"validating":[74],"patterns.":[80],"This":[81],"reduces":[82],"time":[83,93],"market":[85],"cutting":[87],"down":[88],"precious":[90],"debug":[92],"eliminating":[95],"redundant":[96],"defect":[97],"fixes.":[98],"experimental":[100],"results":[101],"were":[102],"obtained":[103],"from":[104],"set":[106],"circuits":[110],"Motorola":[113],"MPC74XX":[114],"microprocessor.":[115]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}