{"id":"https://openalex.org/W2110637318","doi":"https://doi.org/10.1109/mtdt.2002.1029769","title":"March SS: a test for all static simple RAM faults","display_name":"March SS: a test for all static simple RAM faults","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2110637318","doi":"https://doi.org/10.1109/mtdt.2002.1029769","mag":"2110637318"},"language":"en","primary_location":{"id":"doi:10.1109/mtdt.2002.1029769","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mtdt.2002.1029769","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005739146","display_name":"Said Hamdioui","orcid":"https://orcid.org/0000-0002-8961-0387"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL","US"],"is_corresponding":true,"raw_author_name":"S. Hamdioui","raw_affiliation_strings":["Faculty of Information Technology and Systems Computer Engineering Laboratory, Delft University of Technnology, Delft, Netherlands","Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Faculty of Information Technology and Systems Computer Engineering Laboratory, Delft University of Technnology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109858422","display_name":"A.J. van de Goor","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"A.J. van de Goor","raw_affiliation_strings":["Faculty of Information Technology and Systems Computer Engineering Laboratory, Delft University of Technnology, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Faculty of Information Technology and Systems Computer Engineering Laboratory, Delft University of Technnology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111622244","display_name":"M. Rodgers","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Rodgers","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5005739146"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":4.4521,"has_fulltext":false,"cited_by_count":133,"citation_normalized_percentile":{"value":0.94698953,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"95","last_page":"100"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.8472926616668701},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6658490896224976},{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.5355002880096436},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4847678542137146},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.477500855922699},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3838648200035095},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3645055890083313},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32979756593704224},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3203045129776001},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18272769451141357},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12212565541267395},{"id":"https://openalex.org/keywords/geology","display_name":"Geology","score":0.07844120264053345},{"id":"https://openalex.org/keywords/seismology","display_name":"Seismology","score":0.04944378137588501}],"concepts":[{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.8472926616668701},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6658490896224976},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.5355002880096436},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4847678542137146},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.477500855922699},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3838648200035095},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3645055890083313},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32979756593704224},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3203045129776001},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18272769451141357},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12212565541267395},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.07844120264053345},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.04944378137588501},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mtdt.2002.1029769","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mtdt.2002.1029769","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.5.7193","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.5.7193","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://ce.et.tudelft.nl/publicationfiles/633_26_01029769.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W7487116","https://openalex.org/W289624287","https://openalex.org/W1667843264","https://openalex.org/W1963076157","https://openalex.org/W1967824305","https://openalex.org/W1982562477","https://openalex.org/W2077389615","https://openalex.org/W2078063367","https://openalex.org/W2090877534","https://openalex.org/W2097100364","https://openalex.org/W2106246015","https://openalex.org/W2106518380","https://openalex.org/W2106935654","https://openalex.org/W2120987687","https://openalex.org/W2124058650","https://openalex.org/W2126771492","https://openalex.org/W2151318384","https://openalex.org/W4240958371","https://openalex.org/W6600305769"],"related_works":["https://openalex.org/W3133183159","https://openalex.org/W1585007175","https://openalex.org/W2382521049","https://openalex.org/W4297872561","https://openalex.org/W2952222336","https://openalex.org/W2144385241","https://openalex.org/W2116633494","https://openalex.org/W3117544412","https://openalex.org/W2165950148","https://openalex.org/W4253593777"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"all":[3,37,56],"simple":[4,58],"(i.e.,":[5],"not":[6],"linked)":[7],"static":[8,59],"fault":[9],"models":[10],"that":[11,24,54],"have":[12],"been":[13],"shown":[14],"to":[15,35],"exist":[16],"for":[17],"random":[18],"access":[19],"memories":[20],"(RAMs),":[21],"and":[22],"shows":[23],"none":[25],"of":[26,52],"the":[27,33],"current":[28],"industrial":[29],"march":[30],"tests":[31],"has":[32],"capability":[34],"detect":[36],"these":[38],"faults.":[39],"It":[40],"therefore":[41],"introduces":[42],"a":[43,49],"new":[44],"test":[45,50],"(March":[46],"SS),":[47],"with":[48],"length":[51],"22n,":[53],"detects":[55],"realistic":[57],"faults":[60],"in":[61],"RAMs.":[62]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":8},{"year":2012,"cited_by_count":8}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}