{"id":"https://openalex.org/W2131209738","doi":"https://doi.org/10.1109/mse.2003.1205292","title":"Industry needs and expectations of SoC design education","display_name":"Industry needs and expectations of SoC design education","publication_year":2004,"publication_date":"2004-05-13","ids":{"openalex":"https://openalex.org/W2131209738","doi":"https://doi.org/10.1109/mse.2003.1205292","mag":"2131209738"},"language":"en","primary_location":{"id":"doi:10.1109/mse.2003.1205292","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mse.2003.1205292","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086305302","display_name":"Grant Mart\u00edn","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"G. Martin","raw_affiliation_strings":["Cadence Design Systems, Berkeley, CA, USA","Cadence Design Syst. Inc., Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Berkeley, CA, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Syst. Inc., Berkeley, CA, USA","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5086305302"],"corresponding_institution_ids":["https://openalex.org/I66217453"],"apc_list":null,"apc_paid":null,"fwci":0.5266,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.67219105,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"146","last_page":"147"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9794999957084656,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.978600025177002,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.659579873085022},{"id":"https://openalex.org/keywords/curriculum","display_name":"Curriculum","score":0.5765925049781799},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.5229856967926025},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5010209083557129},{"id":"https://openalex.org/keywords/engineering-management","display_name":"Engineering management","score":0.4832480847835541},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4678749740123749},{"id":"https://openalex.org/keywords/cover","display_name":"Cover (algebra)","score":0.4575958847999573},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4564123749732971},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.3705074191093445},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3195614814758301},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.256761372089386},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09197133779525757}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.659579873085022},{"id":"https://openalex.org/C47177190","wikidata":"https://www.wikidata.org/wiki/Q207137","display_name":"Curriculum","level":2,"score":0.5765925049781799},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.5229856967926025},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5010209083557129},{"id":"https://openalex.org/C110354214","wikidata":"https://www.wikidata.org/wiki/Q6314146","display_name":"Engineering management","level":1,"score":0.4832480847835541},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4678749740123749},{"id":"https://openalex.org/C2780428219","wikidata":"https://www.wikidata.org/wiki/Q16952335","display_name":"Cover (algebra)","level":2,"score":0.4575958847999573},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4564123749732971},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.3705074191093445},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3195614814758301},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.256761372089386},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09197133779525757},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C19417346","wikidata":"https://www.wikidata.org/wiki/Q7922","display_name":"Pedagogy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mse.2003.1205292","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mse.2003.1205292","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1529130237","https://openalex.org/W2131962704","https://openalex.org/W2143993690","https://openalex.org/W4250186794","https://openalex.org/W6680051851","https://openalex.org/W6820409237"],"related_works":["https://openalex.org/W1929041301","https://openalex.org/W2038859986","https://openalex.org/W2104315811","https://openalex.org/W2142217172","https://openalex.org/W4230312832","https://openalex.org/W1982273910","https://openalex.org/W2032882110","https://openalex.org/W2127843031","https://openalex.org/W2125423773","https://openalex.org/W2536819812"],"abstract_inverted_index":{"Universities":[0],"are":[1,146],"currently":[2],"updating":[3],"their":[4],"VLSI":[5],"design":[6,30,58,80,112],"education":[7],"offerings":[8],"to":[9,21,47,56,87,149],"cover":[10],"the":[11,36,57,88,109,127],"important":[12,20,121],"needs":[13],"of":[14,35,129],"System-on-Chip":[15],"(SoC)":[16],"design.":[17],"It":[18],"is":[19,25,61],"recognize":[22],"that":[23],"SoC":[24,60],"a":[26,45,52,105,154],"qualitative":[27],"shift":[28],"in":[29],"practice:":[31],"not":[32],"just":[33],"more":[34,53,65,120],"same":[37],"things,":[38],"for":[39,99],"larger":[40,42],"and":[41,51,81,91,97,102,115,126,131,144],"designs,":[43],"but":[44],"need":[46,104],"emphasise":[48],"new":[49,92,110],"topics":[50,70,148],"systematic":[54],"approach":[55],"process.":[59],"as":[62,72,118,138],"much":[63],"or":[64,119],"'System'":[66],"than":[67,122],"'Chip':":[68],"thus":[69],"such":[71,137],"embedded":[73],"software,":[74],"system-level":[75],"design,":[76,78],"algorithmic":[77],"IP":[79,82,100,139],"integration":[83,103],"must":[84],"be":[85],"added":[86],"curriculum.":[89],"Verification,":[90],"verification":[93],"concepts,":[94],"methods,":[95,113],"languages":[96],"tools":[98],"development":[101],"special":[106],"emphasis.":[107],"In":[108],"curriculum,":[111],"processes":[114],"flows":[116],"become":[117],"basic":[123,155],"tool":[124],"mechanics,":[125],"relationship":[128],"standards":[130],"technical-business":[132],"issues":[133],"which":[134,150],"affect":[135],"SoC,":[136],"packaging,":[140],"qualification,":[141],"evaluation,":[142],"acquisition,":[143],"exchange":[145],"all":[147],"students":[151],"should":[152],"have":[153],"exposure.":[156]},"counts_by_year":[{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}