{"id":"https://openalex.org/W2145952143","doi":"https://doi.org/10.1109/mse.2003.1205241","title":"Teaching digital HW-design by implementing a complete MP3 decoder","display_name":"Teaching digital HW-design by implementing a complete MP3 decoder","publication_year":2004,"publication_date":"2004-05-13","ids":{"openalex":"https://openalex.org/W2145952143","doi":"https://doi.org/10.1109/mse.2003.1205241","mag":"2145952143"},"language":"en","primary_location":{"id":"doi:10.1109/mse.2003.1205241","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mse.2003.1205241","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110263141","display_name":"H. Hedberg","orcid":null},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"H. Hedberg","raw_affiliation_strings":["Department of Electroscience, Lund University, Lund, Sweden","Dept. Of Electrosci., Lund Univ., Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electroscience, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"Dept. Of Electrosci., Lund Univ., Sweden","institution_ids":["https://openalex.org/I187531555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041977178","display_name":"Thomas Lenart","orcid":null},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"T. Lenart","raw_affiliation_strings":["Department of Electroscience, Lund University, Lund, Sweden","Dept. Of Electrosci., Lund Univ., Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electroscience, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"Dept. Of Electrosci., Lund Univ., Sweden","institution_ids":["https://openalex.org/I187531555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019258985","display_name":"Henrik Svensson","orcid":null},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"H. Svensson","raw_affiliation_strings":["Department of Electroscience, Lund University, Lund, Sweden","Dept. Of Electrosci., Lund Univ., Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electroscience, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"Dept. Of Electrosci., Lund Univ., Sweden","institution_ids":["https://openalex.org/I187531555"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084408140","display_name":"Peter Nilsson","orcid":"https://orcid.org/0000-0002-4657-8532"},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"P. Nilsson","raw_affiliation_strings":["Department of Electroscience, Lund University, Lund, Sweden","Dept. Of Electrosci., Lund Univ., Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electroscience, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"Dept. Of Electrosci., Lund Univ., Sweden","institution_ids":["https://openalex.org/I187531555"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017806402","display_name":"Viktor \u00d6wall","orcid":"https://orcid.org/0000-0002-3368-1207"},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"V. Owall","raw_affiliation_strings":["Department of Electroscience, Lund University, Lund, Sweden","Dept. Of Electrosci., Lund Univ., Sweden"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electroscience, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"Dept. Of Electrosci., Lund Univ., Sweden","institution_ids":["https://openalex.org/I187531555"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I187531555"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"31","last_page":"32"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.986299991607666,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9861999750137329,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.79315584897995},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.788453221321106},{"id":"https://openalex.org/keywords/scope","display_name":"Scope (computer science)","score":0.7004249691963196},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6924169659614563},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.6836243271827698},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6375992894172668},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5563619136810303},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.553894579410553},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4284849166870117},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.424582302570343},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.41378548741340637},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4056023359298706},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3471648395061493},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.243920236825943},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2297135293483734},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.20136535167694092},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.14040058851242065}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.79315584897995},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.788453221321106},{"id":"https://openalex.org/C2778012447","wikidata":"https://www.wikidata.org/wiki/Q1034415","display_name":"Scope (computer science)","level":2,"score":0.7004249691963196},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6924169659614563},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.6836243271827698},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6375992894172668},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5563619136810303},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.553894579410553},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4284849166870117},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.424582302570343},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.41378548741340637},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4056023359298706},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3471648395061493},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.243920236825943},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2297135293483734},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.20136535167694092},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.14040058851242065},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/mse.2003.1205241","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mse.2003.1205241","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.106.7800","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.106.7800","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://csdl.computer.org/comp/proceedings/mse/2003/1973/00/19730031.pdf","raw_type":"text"},{"id":"pmh:oai:lup.lub.lu.se:81db5170-cdba-4470-b5aa-87f20ff34df0","is_oa":false,"landing_page_url":"https://lup.lub.lu.se/record/613196","pdf_url":null,"source":{"id":"https://openalex.org/S4306400536","display_name":"Lund University Publications (Lund University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I187531555","host_organization_name":"Lund University","host_organization_lineage":["https://openalex.org/I187531555"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2006771055","https://openalex.org/W2124798471"],"related_works":["https://openalex.org/W4245336546","https://openalex.org/W2123076670","https://openalex.org/W2038511870","https://openalex.org/W2326620043","https://openalex.org/W2075511834","https://openalex.org/W2543290882","https://openalex.org/W2126475478","https://openalex.org/W2115970675","https://openalex.org/W4386859294","https://openalex.org/W2030503305"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,44,62],"project":[4,19],"course":[5],"that":[6],"focuses":[7],"on":[8],"all":[9],"the":[10,41,56],"different":[11],"stages":[12],"in":[13,48],"an":[14],"ASIC":[15],"design":[16],"flow.":[17],"The":[18,38],"starts":[20],"at":[21],"algorithm":[22],"level,":[23],"followed":[24],"by":[25],"architecture":[26],"selection,":[27],"netlist":[28],"generation,":[29],"down":[30],"to":[31,58],"physical":[32],"layout,":[33],"fabrication,":[34,54],"and":[35,50],"finally":[36],"verification.":[37],"scope":[39],"of":[40],"project,":[42],"implementing":[43],"complete":[45],"MP3":[46],"decoder":[47],"VHDL":[49],"sending":[51],"it":[52],"for":[53],"motivates":[55],"students":[57],"work":[59],"hard":[60],"towards":[61],"common":[63],"goal.":[64]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-15T18:14:33.161393","created_date":"2025-10-10T00:00:00"}
