{"id":"https://openalex.org/W4412560761","doi":"https://doi.org/10.1109/mocast65744.2025.11083949","title":"Low-Loss GSG Bondwire Chip-to-Chip Interconnects From DC to 330 Ghz","display_name":"Low-Loss GSG Bondwire Chip-to-Chip Interconnects From DC to 330 Ghz","publication_year":2025,"publication_date":"2025-06-11","ids":{"openalex":"https://openalex.org/W4412560761","doi":"https://doi.org/10.1109/mocast65744.2025.11083949"},"language":"en","primary_location":{"id":"doi:10.1109/mocast65744.2025.11083949","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast65744.2025.11083949","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041854784","display_name":"Franz Alwin D\u00fcrrwald","orcid":"https://orcid.org/0009-0006-7933-2906"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Franz Alwin D\u00fcrrwald","raw_affiliation_strings":["Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001982662","display_name":"Florian Protze","orcid":"https://orcid.org/0000-0002-6950-6814"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Florian Protze","raw_affiliation_strings":["Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010934672","display_name":"Darko Cvetkovski","orcid":"https://orcid.org/0000-0003-1133-376X"},"institutions":[{"id":"https://openalex.org/I96578850","display_name":"Leibniz Institute for Neurobiology","ror":"https://ror.org/01zwmgk08","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I96578850"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Darko Cvetkovski","raw_affiliation_strings":["IHP - Leibniz-Institut f&#x00FC;r innovative Mikroelektronik,Frankfurt (Oder),Germany"],"affiliations":[{"raw_affiliation_string":"IHP - Leibniz-Institut f&#x00FC;r innovative Mikroelektronik,Frankfurt (Oder),Germany","institution_ids":["https://openalex.org/I96578850"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014229152","display_name":"Tilo Meister","orcid":"https://orcid.org/0000-0001-6429-0105"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tilo Meister","raw_affiliation_strings":["Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111617436","display_name":"Rolf Kraemer","orcid":null},"institutions":[{"id":"https://openalex.org/I51783024","display_name":"Brandenburg University of Technology Cottbus-Senftenberg","ror":"https://ror.org/02wxx3e24","country_code":"DE","type":"education","lineage":["https://openalex.org/I51783024"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rolf Kraemer","raw_affiliation_strings":["Brandenburgische Technische Universit&#x00E4;t Cottbus-Senftenberg,Cottbus,Germany"],"affiliations":[{"raw_affiliation_string":"Brandenburgische Technische Universit&#x00E4;t Cottbus-Senftenberg,Cottbus,Germany","institution_ids":["https://openalex.org/I51783024"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049816054","display_name":"Frank Ellinger","orcid":"https://orcid.org/0000-0001-6714-0479"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Frank Ellinger","raw_affiliation_strings":["Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit&#x00E4;t,Chair for Circuit Design and Network Theory,Dresden,Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5041854784"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":0.7467,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.75241911,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.980400025844574,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9645000100135803,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6813218593597412},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.502760648727417},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.48705723881721497},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44496703147888184},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4123159348964691},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3659570813179016},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29775965213775635},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2623818516731262}],"concepts":[{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6813218593597412},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.502760648727417},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.48705723881721497},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44496703147888184},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4123159348964691},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3659570813179016},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29775965213775635},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2623818516731262}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast65744.2025.11083949","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast65744.2025.11083949","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G1362376325","display_name":null,"funder_award_id":"458074433","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2104320098","https://openalex.org/W2141707986","https://openalex.org/W2204063291","https://openalex.org/W2787505009","https://openalex.org/W4250259382","https://openalex.org/W4308086333","https://openalex.org/W4385624979","https://openalex.org/W4402744042"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W4404995717","https://openalex.org/W2016187641","https://openalex.org/W4404725684","https://openalex.org/W4246450666","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W2136854845"],"abstract_inverted_index":{"This":[0],"research":[1],"work":[2],"provides":[3],"a":[4,8,15],"measurement-backed":[5],"analysis":[6],"of":[7,18,40,101],"single-ended":[9],"chip-to-chip":[10],"bondwire":[11,31,67],"interface":[12],"(BWI)":[13],"with":[14,69],"signal":[16,34],"pattern":[17],"ground-signal-ground":[19],"(GSG)":[20],"designed":[21],"for":[22,84],"minimum":[23],"insertion":[24,73],"loss.":[25],"Different":[26],"approaches":[27],"to":[28,59],"reducing":[29],"the":[30,38,45,82,96,102],"length":[32],"and":[33,48,52,92,98],"disturbing":[35],"factors":[36],"at":[37,75],"intersection":[39],"two":[41],"microchips":[42],"(such":[43],"as":[44],"scribe":[46],"lines":[47],"sealrings)":[49],"are":[50,89],"investigated":[51],"compared.":[53],"Reproducible,":[54],"seamless":[55],"measurements":[56],"from":[57],"DC":[58],"330":[60],"GHz":[61,77],"have":[62],"successfully":[63],"demonstrated":[64],"that":[65],"GSG":[66],"interconnects":[68],"only":[70],"3":[71],"dB":[72],"loss":[74],"300":[76],"can":[78,93],"be":[79],"realized":[80],"without":[81],"need":[83],"tailored":[85],"on-chip":[86],"structures,":[87],"which":[88],"typically":[90],"area-intensive":[91],"significantly":[94],"limit":[95],"bandwidth":[97],"universal":[99],"applicability":[100],"chip.":[103]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
