{"id":"https://openalex.org/W4412560599","doi":"https://doi.org/10.1109/mocast65744.2025.11083925","title":"Specification of Generic Memristor-Based Crossbar Architectures for In-Memory Computing","display_name":"Specification of Generic Memristor-Based Crossbar Architectures for In-Memory Computing","publication_year":2025,"publication_date":"2025-06-11","ids":{"openalex":"https://openalex.org/W4412560599","doi":"https://doi.org/10.1109/mocast65744.2025.11083925"},"language":"en","primary_location":{"id":"doi:10.1109/mocast65744.2025.11083925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast65744.2025.11083925","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5119040004","display_name":"Benjamin Seiler","orcid":null},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Benjamin Seiler","raw_affiliation_strings":["FAU Erlangen-Nürnberg,Chair of Computer Science 3,Erlangen,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FAU Erlangen-Nürnberg,Chair of Computer Science 3,Erlangen,Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030918623","display_name":"Dietmar Fey","orcid":"https://orcid.org/0000-0002-6077-4732"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Dietmar Fey","raw_affiliation_strings":["FAU Erlangen-Nürnberg,Chair of Computer Science 3,Erlangen,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FAU Erlangen-Nürnberg,Chair of Computer Science 3,Erlangen,Germany","institution_ids":["https://openalex.org/I181369854"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I181369854"],"apc_list":null,"apc_paid":null,"fwci":3.4704,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.88831329,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9865999817848206,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13052","display_name":"Molecular Communication and Nanonetworks","score":0.9686999917030334,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.903718113899231},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8929306268692017},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7366162538528442},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6148191094398499},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4451356828212738},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.43101298809051514},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40463748574256897},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.19761618971824646},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15721935033798218},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12472644448280334},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1032402515411377},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08014494180679321}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.903718113899231},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8929306268692017},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7366162538528442},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6148191094398499},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4451356828212738},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.43101298809051514},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40463748574256897},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.19761618971824646},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15721935033798218},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12472644448280334},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1032402515411377},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08014494180679321}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast65744.2025.11083925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast65744.2025.11083925","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 14th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2329040051","https://openalex.org/W2346143906","https://openalex.org/W2515763243","https://openalex.org/W2925767305","https://openalex.org/W2944987128","https://openalex.org/W2960778947","https://openalex.org/W3018945530","https://openalex.org/W3095790489","https://openalex.org/W4205341165","https://openalex.org/W4280543111"],"related_works":["https://openalex.org/W3005999147","https://openalex.org/W2015497999","https://openalex.org/W3164474614","https://openalex.org/W2171130799","https://openalex.org/W2005875039","https://openalex.org/W3173413269","https://openalex.org/W2015477599","https://openalex.org/W2144085790","https://openalex.org/W2548135880","https://openalex.org/W3177379469"],"abstract_inverted_index":{"Processing":[0],"data":[1,46],"where":[2],"it":[3],"resides,":[4],"as":[5],"envisioned":[6],"by":[7],"in-memory":[8],"computing":[9,55],"(IMC)":[10],"concepts,":[11],"is":[12],"expected":[13],"to":[14,29,81,87],"be":[15,105],"the":[16,31,45,49,71,84,92,147],"next":[17],"step":[18],"after":[19],"multi-core":[20],"and":[21,27,42,54,63,75,94,130,149,155,157],"heterogeneous":[22],"architectures":[23,154],"consisting":[24],"of":[25,36,44,73,96,151],"CPU":[26],"accelerators":[28],"counteract":[30],"energy":[32,41,85],"wall.":[33],"The":[34],"use":[35],"memristors":[37],"offers":[38],"low":[39],"read":[40],"non-volatility":[43],"when":[47],"accessing":[48],"memory.":[50],"This":[51,120],"helps":[52],"energy-":[53],"performance":[56],"hungry":[57],"embedded":[58],"functions":[59,77],"for":[60,146,161],"artificial":[61],"intelligence":[62],"machine":[64],"learning.":[65],"In":[66],"addition,":[67],"memristive":[68,117,152],"devices":[69],"enable":[70,126],"integration":[72],"storage":[74],"processing":[76],"in":[78,138],"close":[79],"proximity":[80],"significantly":[82],"reduce":[83],"required":[86],"transport":[88],"data.":[89],"To":[90,135],"simplify":[91],"design":[93,133,148],"simulation":[95,123,128,150],"IMC":[97],"architectures,":[98],"mixed-signal":[99],"or":[100],"generally":[101],"mixed-abstraction":[102],"simulations":[103],"would":[104],"ideal,":[106],"which":[107],"simultaneously":[108],"combine":[109],"digital":[110],"architecture":[111],"elements":[112],"with":[113],"analogue":[114],"components,":[115],"e.g.":[116],"matrixvector":[118],"accelerators.":[119],"requires":[121],"new":[122],"environments":[124],"that":[125],"fast":[127],"times":[129],"a":[131],"flexible":[132],"process.":[134],"move":[136],"forward":[137],"this":[139],"direction,":[140],"we":[141],"present":[142],"our":[143],"SystemC-based":[144],"solution":[145],"crossbar":[153],"demonstrate":[156],"evaluate":[158],"its":[159],"usefulness":[160],"selected":[162],"neuromorphic":[163],"architectures.":[164]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}