{"id":"https://openalex.org/W4384517538","doi":"https://doi.org/10.1109/mocast57943.2023.10176888","title":"Analog Latch for Time-Mode PWM Signal Processing","display_name":"Analog Latch for Time-Mode PWM Signal Processing","publication_year":2023,"publication_date":"2023-06-28","ids":{"openalex":"https://openalex.org/W4384517538","doi":"https://doi.org/10.1109/mocast57943.2023.10176888"},"language":"en","primary_location":{"id":"doi:10.1109/mocast57943.2023.10176888","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mocast57943.2023.10176888","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030791026","display_name":"Konstantinos P. Pagkalos","orcid":"https://orcid.org/0000-0001-6360-0036"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Konstantinos P. Pagkalos","raw_affiliation_strings":["University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025465782","display_name":"Orfeas Panetas-Felouris","orcid":"https://orcid.org/0000-0003-1050-8046"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Orfeas Panetas-Felouris","raw_affiliation_strings":["University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014056230","display_name":"Vasileios Kalenteridis","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Vasileios Kalenteridis","raw_affiliation_strings":["Thess IC SMPC,Thessaloniki,Greece,55535"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Thess IC SMPC,Thessaloniki,Greece,55535","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069238230","display_name":"S. Vlassis","orcid":"https://orcid.org/0000-0003-2687-0285"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Spyridon Vlassis","raw_affiliation_strings":["University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,Electronics Laboratory,Physics Dept.,Rio Achaia,Greece,26504","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09190282,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9873999953269958,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.98580002784729,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pulse-width-modulation","display_name":"Pulse-width modulation","score":0.7010309100151062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6339375376701355},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6309343576431274},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.5619675517082214},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.544414222240448},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5133542418479919},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.49670058488845825},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4663267433643341},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4226728677749634},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3929704427719116},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.28251177072525024},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.27889350056648254},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23255059123039246},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22002002596855164},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.17235082387924194},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07874742150306702}],"concepts":[{"id":"https://openalex.org/C92746544","wikidata":"https://www.wikidata.org/wiki/Q585184","display_name":"Pulse-width modulation","level":3,"score":0.7010309100151062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6339375376701355},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6309343576431274},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.5619675517082214},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.544414222240448},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5133542418479919},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.49670058488845825},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4663267433643341},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4226728677749634},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3929704427719116},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.28251177072525024},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.27889350056648254},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23255059123039246},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22002002596855164},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.17235082387924194},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07874742150306702},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast57943.2023.10176888","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mocast57943.2023.10176888","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.800000011920929,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1528187778","https://openalex.org/W2008148578","https://openalex.org/W2050476983","https://openalex.org/W2164964876","https://openalex.org/W2964201524","https://openalex.org/W4206121983","https://openalex.org/W4220710636","https://openalex.org/W4311591648"],"related_works":["https://openalex.org/W4210376836","https://openalex.org/W2596211269","https://openalex.org/W197862639","https://openalex.org/W1591963733","https://openalex.org/W2021671109","https://openalex.org/W4210925376","https://openalex.org/W2053914166","https://openalex.org/W3097613282","https://openalex.org/W2136192029","https://openalex.org/W4313444376"],"abstract_inverted_index":{"In":[0,20],"this":[1],"work,":[2],"an":[3],"analog":[4,41,74],"latch":[5,42],"is":[6,32],"proposed":[7,68],"dedicated":[8],"for":[9,16,47,114],"the":[10,25,33,40,53,64,71,108],"construction":[11],"of":[12,28,39,73],"PWM":[13,21],"time-mode":[14,22],"systems":[15],"sampled-data":[17],"signal":[18,23],"processing.":[19],"processing":[24,34],"pulse":[26,31],"width":[27],"a":[29,115],"rectangular":[30],"variable.":[35],"The":[36,67,103],"latching":[37],"time":[38],"can":[43,84],"be":[44],"easily":[45],"programmed":[46],"lower":[48],"sampling":[49,104],"frequencies":[50],"without":[51],"increasing":[52],"storing":[54],"capacitor,":[55],"which":[56],"leads":[57],"to":[58,63,86],"smaller":[59],"chip":[60],"area":[61],"compared":[62],"traditional":[65],"approach.":[66],"structure":[69],"combines":[70],"advantages":[72],"and":[75,82,88,96,118],"digital":[76],"systems,":[77],"it":[78,83],"has":[79],"simple":[80],"structure,":[81],"lead":[85],"modular":[87],"versatile":[89],"hierarchy":[90],"design.":[91],"All":[92],"blocks":[93],"are":[94],"designed":[95],"verified":[97],"in":[98],"TSMC":[99],"65nm":[100],"technology":[101],"node.":[102],"frequency":[105],"was":[106,111,121],"625kHz,":[107],"accumulated":[109],"error":[110],"around":[112],"170ps":[113],"delay":[116],"1.6us":[117],"current":[119],"consumption":[120],"23.8\u03bcA.":[122]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}