{"id":"https://openalex.org/W4384517530","doi":"https://doi.org/10.1109/mocast57943.2023.10176615","title":"Evaluating Versal ACAP and conventional FPGA platforms for AI inference","display_name":"Evaluating Versal ACAP and conventional FPGA platforms for AI inference","publication_year":2023,"publication_date":"2023-06-28","ids":{"openalex":"https://openalex.org/W4384517530","doi":"https://doi.org/10.1109/mocast57943.2023.10176615"},"language":"en","primary_location":{"id":"doi:10.1109/mocast57943.2023.10176615","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mocast57943.2023.10176615","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5092483356","display_name":"Aimilios Leftheriotis","orcid":"https://orcid.org/0000-0003-1347-980X"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Aimilios Leftheriotis","raw_affiliation_strings":["University of Patras,School of Electrical & Computer Engineering,Patras,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,School of Electrical & Computer Engineering,Patras,Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066905820","display_name":"Aphrodite Tzomaka","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Aphrodite Tzomaka","raw_affiliation_strings":["National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087162281","display_name":"Dimitrios Danopoulos","orcid":"https://orcid.org/0000-0001-9327-5983"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Danopoulos","raw_affiliation_strings":["National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053524294","display_name":"George Lentaris","orcid":"https://orcid.org/0000-0003-1664-8648"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Lentaris","raw_affiliation_strings":["National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110387177","display_name":"George Theodoridis","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Theodoridis","raw_affiliation_strings":["University of Patras,School of Electrical & Computer Engineering,Patras,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,School of Electrical & Computer Engineering,Patras,Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technological University of Athens,School of Electrical & Computer Engineering,Athens,Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5415,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.51926836,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7947283983230591},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7296279668807983},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6214399337768555},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.5866091251373291},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.5823843479156494},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.565199613571167},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5358238220214844},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.48619431257247925},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.4837629795074463},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.44437167048454285},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3734169602394104},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3318469822406769},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.17144230008125305},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.1706312894821167}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7947283983230591},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7296279668807983},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6214399337768555},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.5866091251373291},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.5823843479156494},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.565199613571167},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5358238220214844},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.48619431257247925},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.4837629795074463},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.44437167048454285},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3734169602394104},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3318469822406769},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.17144230008125305},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.1706312894821167},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast57943.2023.10176615","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mocast57943.2023.10176615","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W639708223","https://openalex.org/W1901129140","https://openalex.org/W2194775991","https://openalex.org/W2891911973","https://openalex.org/W2895540242","https://openalex.org/W2907463061","https://openalex.org/W2915644294","https://openalex.org/W2918037051","https://openalex.org/W2963037989","https://openalex.org/W2963163009","https://openalex.org/W3035387868","https://openalex.org/W4281872978","https://openalex.org/W4304693398","https://openalex.org/W4312443924","https://openalex.org/W4319870545","https://openalex.org/W4321637087","https://openalex.org/W6811032075"],"related_works":["https://openalex.org/W2348165886","https://openalex.org/W1862215007","https://openalex.org/W2003657881","https://openalex.org/W4319952061","https://openalex.org/W4280636456","https://openalex.org/W4388913998","https://openalex.org/W4310584535","https://openalex.org/W4295935044","https://openalex.org/W4307927141","https://openalex.org/W3159906349"],"abstract_inverted_index":{"Xilinx":[0],"Versal":[1,103],"ACAP":[2],"is":[3,51],"the":[4,14,17,23,48,59,81,87,95,98,102,118,122,126],"newest":[5],"acceleration":[6],"platform,":[7],"developed":[8],"by":[9,53,121,131],"Xilinx,":[10],"proposed":[11],"to":[12,77,92,117],"enhance":[13],"capabilities":[15],"of":[16,25,67,101,108],"conventional":[18],"FPGA":[19,50],"ones":[20],"and":[21,47,69,97],"meet":[22],"demands":[24],"modern":[26],"applications.":[27,57],"However,":[28],"only":[29],"few":[30],"studies":[31],"concerning":[32],"its":[33],"benefits":[34,96],"have":[35],"been":[36],"performed.":[37],"To":[38],"address":[39],"this":[40,45],"issue,":[41],"a":[42,64,105],"comparison":[43],"between":[44],"platform":[46,83],"MPSoC":[49],"performed":[52],"targeting":[54],"Deep":[55],"Learning":[56],"Using":[58],"Vitis":[60,123],"AI":[61,88,124],"inference":[62],"framework,":[63,125],"large":[65],"number":[66],"convolution":[68],"fully-connected":[70],"models":[71],"were":[72],"implemented.":[73],"This":[74],"exploration":[75],"lead":[76],"several":[78],"conclusions":[79],"regarding":[80],"optimal":[82],"selection":[84],"depending":[85],"on":[86],"model":[89,112],"characteristics.":[90],"Also,":[91],"further":[93],"evaluate":[94],"programmability":[99],"trade-offs":[100],"ACAP,":[104],"custom":[106,127],"architecture":[107],"an":[109],"image":[110],"super-resolution":[111],"(ESPCN)":[113],"was":[114],"developed.":[115],"Compared":[116],"implementation":[119],"derived":[120],"design":[128],"improves":[129],"latency":[130],"4.5x.":[132]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}