{"id":"https://openalex.org/W4384517557","doi":"https://doi.org/10.1109/mocast57943.2023.10176426","title":"BTI Aging Influence and Mitigation in Neural Networks Oriented In-Memory Computing SRAMs","display_name":"BTI Aging Influence and Mitigation in Neural Networks Oriented In-Memory Computing SRAMs","publication_year":2023,"publication_date":"2023-06-28","ids":{"openalex":"https://openalex.org/W4384517557","doi":"https://doi.org/10.1109/mocast57943.2023.10176426"},"language":"en","primary_location":{"id":"doi:10.1109/mocast57943.2023.10176426","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast57943.2023.10176426","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5092483369","display_name":"Christina Dilopoulou","orcid":null},"institutions":[{"id":"https://openalex.org/I194019607","display_name":"University of Ioannina","ror":"https://ror.org/01qg3j183","country_code":"GR","type":"education","lineage":["https://openalex.org/I194019607"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Christina Dilopoulou","raw_affiliation_strings":["University of Ioannina,Dept. of Computer Science and Engineering,Ioannina,Greece","Dept. of Computer Science and Engineering, University of Ioannina, Ioannina, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Ioannina,Dept. of Computer Science and Engineering,Ioannina,Greece","institution_ids":["https://openalex.org/I194019607"]},{"raw_affiliation_string":"Dept. of Computer Science and Engineering, University of Ioannina, Ioannina, Greece","institution_ids":["https://openalex.org/I194019607"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036684985","display_name":"Yiorgos Tsiatouhas","orcid":"https://orcid.org/0000-0001-8408-6929"},"institutions":[{"id":"https://openalex.org/I194019607","display_name":"University of Ioannina","ror":"https://ror.org/01qg3j183","country_code":"GR","type":"education","lineage":["https://openalex.org/I194019607"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Yiorgos Tsiatouhas","raw_affiliation_strings":["University of Ioannina,Dept. of Computer Science and Engineering,Ioannina,Greece","Dept. of Computer Science and Engineering, University of Ioannina, Ioannina, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Ioannina,Dept. of Computer Science and Engineering,Ioannina,Greece","institution_ids":["https://openalex.org/I194019607"]},{"raw_affiliation_string":"Dept. of Computer Science and Engineering, University of Ioannina, Ioannina, Greece","institution_ids":["https://openalex.org/I194019607"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I194019607"],"apc_list":null,"apc_paid":null,"fwci":2.7043,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.90226816,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8201658129692078},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7286174297332764},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.6031265258789062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6013402938842773},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.5715648531913757},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4971506893634796},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.44990357756614685},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4347628951072693},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.41865837574005127},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.417659729719162},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3587959408760071},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.27129071950912476},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2572711110115051},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18546739220619202},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.17984458804130554},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07535555958747864},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07050535082817078}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8201658129692078},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7286174297332764},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.6031265258789062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6013402938842773},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.5715648531913757},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4971506893634796},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.44990357756614685},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4347628951072693},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.41865837574005127},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.417659729719162},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3587959408760071},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.27129071950912476},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2572711110115051},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18546739220619202},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.17984458804130554},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07535555958747864},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07050535082817078},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast57943.2023.10176426","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast57943.2023.10176426","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1600691640","https://openalex.org/W1991891926","https://openalex.org/W2007339694","https://openalex.org/W2134777311","https://openalex.org/W2144154842","https://openalex.org/W2899641901","https://openalex.org/W2911335106","https://openalex.org/W3000301330","https://openalex.org/W3026786299","https://openalex.org/W3118608800","https://openalex.org/W3170773788","https://openalex.org/W6787972765"],"related_works":["https://openalex.org/W2089002058","https://openalex.org/W1909296377","https://openalex.org/W3185029353","https://openalex.org/W3116379964","https://openalex.org/W2766443086","https://openalex.org/W2915176329","https://openalex.org/W2793465010","https://openalex.org/W2967161359","https://openalex.org/W2208608937","https://openalex.org/W2186356227"],"abstract_inverted_index":{"Static":[0],"random":[1],"access":[2],"memories":[3],"(SRAMs)":[4],"are":[5],"commonly":[6],"used":[7],"in":[8,20,102],"In-Memory":[9],"Computing":[10],"(IMC)":[11],"architectures":[12,61],"that":[13],"perform":[14],"neural":[15],"network":[16],"related":[17],"computations":[18],"directly":[19],"the":[21,25,53,83],"memory":[22],"unit,":[23],"overcoming":[24],"data":[26],"transfer":[27],"constrains":[28],"of":[29,86],"traditional":[30],"Von-Neumann":[31],"architectures.":[32],"However,":[33],"Bias":[34],"Temperature":[35],"Instability":[36],"(BTI)":[37],"aging":[38,55,65,80],"is":[39,91],"a":[40],"growing":[41],"reliability":[42,71,85],"concern":[43],"for":[44],"nanometer":[45],"technology":[46],"SRAMs.":[47],"In":[48],"this":[49],"paper,":[50],"we":[51],"examine":[52],"BTI":[54,79],"influence":[56],"on":[57],"SRAM":[58],"based":[59],"IMC":[60,87],"and":[62,72,100],"propose":[63],"an":[64],"mitigation":[66,90],"method":[67],"to":[68,75],"enhance":[69],"their":[70],"lifetime.":[73],"According":[74],"our":[76],"simulation":[77],"results,":[78],"can":[81],"affect":[82],"computation":[84],"cells.":[88,104],"Aging":[89],"achieved":[92],"by":[93],"periodically":[94],"alternating":[95],"active":[96],"with":[97],"inactive":[98],"transistors":[99],"vice-versa":[101],"these":[103]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}