{"id":"https://openalex.org/W2949359697","doi":"https://doi.org/10.1109/mocast.2019.8742062","title":"Memristive Circuits for the Simulation of the Earthquake Process","display_name":"Memristive Circuits for the Simulation of the Earthquake Process","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2949359697","doi":"https://doi.org/10.1109/mocast.2019.8742062","mag":"2949359697"},"language":"en","primary_location":{"id":"doi:10.1109/mocast.2019.8742062","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast.2019.8742062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033896120","display_name":"Grigorios Tastzoglou","orcid":null},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Grigorios Tastzoglou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088436387","display_name":"Vasileios Ntinas","orcid":"https://orcid.org/0000-0002-2367-5567"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Vasileios Ntinas","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025143716","display_name":"Ioakeim G. Georgoudas","orcid":"https://orcid.org/0000-0002-4244-0616"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Ioakeim G. Georgoudas","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006130495","display_name":"Angelos Amanatiadis","orcid":"https://orcid.org/0000-0002-1595-2683"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Angelos Amanatiadis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace (DUTh), Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008924272","display_name":"Georgios Ch. Sirakoulis","orcid":"https://orcid.org/0000-0001-8240-484X"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Georgios Ch. Sirakoulis","raw_affiliation_strings":["Democritus University of Thrace, Komotini, GR"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Democritus University of Thrace, Komotini, GR","institution_ids":["https://openalex.org/I147962203"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I147962203"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05068098,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"46","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10581","display_name":"Neural dynamics and brain function","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.933799147605896},{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.8151640892028809},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.7491273880004883},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5853608846664429},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5482627749443054},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5469992756843567},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5249647498130798},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.521095871925354},{"id":"https://openalex.org/keywords/oscillation","display_name":"Oscillation (cell signaling)","score":0.45476773381233215},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.44045352935791016},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42199838161468506},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37287354469299316},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28858262300491333},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.135370671749115}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.933799147605896},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.8151640892028809},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.7491273880004883},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5853608846664429},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5482627749443054},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5469992756843567},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5249647498130798},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.521095871925354},{"id":"https://openalex.org/C2778439541","wikidata":"https://www.wikidata.org/wiki/Q7106412","display_name":"Oscillation (cell signaling)","level":2,"score":0.45476773381233215},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.44045352935791016},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42199838161468506},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37287354469299316},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28858262300491333},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.135370671749115},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast.2019.8742062","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast.2019.8742062","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1484829657","https://openalex.org/W1859860849","https://openalex.org/W1970645895","https://openalex.org/W1991987933","https://openalex.org/W2020510671","https://openalex.org/W2029516326","https://openalex.org/W2052235661","https://openalex.org/W2079756960","https://openalex.org/W2093387174","https://openalex.org/W2112181056"],"related_works":["https://openalex.org/W3170109256","https://openalex.org/W2185262500","https://openalex.org/W4251693286","https://openalex.org/W1543954628","https://openalex.org/W4385367273","https://openalex.org/W2797315502","https://openalex.org/W2163054919","https://openalex.org/W4283019775","https://openalex.org/W4252977987","https://openalex.org/W608447876"],"abstract_inverted_index":{"In":[0,90],"this":[1,42,94],"study,":[2,95],"a":[3],"grid":[4],"that":[5,80],"consists":[6],"of":[7,20,46,64,93,124],"inductor-capacitor-memristor":[8,54],"circuits":[9],"has":[10],"been":[11],"developed":[12],"to":[13,27,38,41],"simulate":[14],"earthquake":[15,85],"propagation.":[16],"The":[17,57],"main":[18],"advantage":[19],"the":[21,44,47,52,62,65,68,71,78,81,84,91,96,103,122,125],"memristor":[22,48],"device":[23],"is":[24,36,49,88,100,108],"its":[25,29],"ability":[26],"remember":[28],"last":[30],"state":[31],"even":[32],"when":[33],"no":[34],"voltage":[35],"applied":[37],"it.":[39],"Due":[40],"feature,":[43],"use":[45],"favored":[50],"in":[51],"proposed":[53,97,126],"(LCM)":[55],"circuit.":[56],"inductors":[58],"and":[59,75,110],"capacitors":[60],"emulate":[61],"oscillation":[63],"rocks,":[66],"whereas":[67],"memristors":[69],"engage":[70],"circuit's":[72],"energy":[73],"loss":[74],"act":[76],"as":[77],"memory":[79],"data":[82],"affecting":[83],"propagation":[86],"process":[87],"stored.":[89],"context":[92],"circuit":[98],"model":[99],"designed":[101],"on":[102],"LTspice":[104],"platform.":[105],"Furthermore,":[106],"it":[107],"tested":[109],"validated":[111],"with":[112],"real":[113],"seismic":[114],"data.":[115],"Preliminary":[116],"results":[117],"are":[118],"quite":[119],"encouraging":[120],"regarding":[121],"response":[123],"model.":[127]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}