{"id":"https://openalex.org/W2951045917","doi":"https://doi.org/10.1109/mocast.2019.8741677","title":"Simplified Hardware Implementation of the Softmax Activation Function","display_name":"Simplified Hardware Implementation of the Softmax Activation Function","publication_year":2019,"publication_date":"2019-05-01","ids":{"openalex":"https://openalex.org/W2951045917","doi":"https://doi.org/10.1109/mocast.2019.8741677","mag":"2951045917"},"language":"en","primary_location":{"id":"doi:10.1109/mocast.2019.8741677","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast.2019.8741677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090575086","display_name":"Ioannis Kouretas","orcid":"https://orcid.org/0000-0002-8574-8469"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"I. Kouretas","raw_affiliation_strings":["Electrical and Computer Engineering Dept., University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Dept., University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021252086","display_name":"Vassilis Paliouras","orcid":"https://orcid.org/0000-0002-1414-7500"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"V. Paliouras","raw_affiliation_strings":["Electrical and Computer Engineering Dept., University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Dept., University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090575086"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":5.0076,"has_fulltext":false,"cited_by_count":95,"citation_normalized_percentile":{"value":0.95938708,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/softmax-function","display_name":"Softmax function","score":0.9750146865844727},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7202414870262146},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6566221117973328},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6011868119239807},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5452767014503479},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.5413515567779541},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.48218074440956116},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43666404485702515},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.42874765396118164},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4035005271434784},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3730613589286804},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.23601922392845154},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2262745201587677},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.17530053853988647},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14076027274131775},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10710912942886353},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0985117256641388},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0957459807395935}],"concepts":[{"id":"https://openalex.org/C188441871","wikidata":"https://www.wikidata.org/wiki/Q7554146","display_name":"Softmax function","level":3,"score":0.9750146865844727},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7202414870262146},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6566221117973328},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6011868119239807},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5452767014503479},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.5413515567779541},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.48218074440956116},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43666404485702515},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.42874765396118164},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4035005271434784},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3730613589286804},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.23601922392845154},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2262745201587677},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.17530053853988647},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14076027274131775},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10710912942886353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0985117256641388},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0957459807395935},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mocast.2019.8741677","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mocast.2019.8741677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1844620123","https://openalex.org/W2102605133","https://openalex.org/W2136603500","https://openalex.org/W2317679594","https://openalex.org/W2608093348","https://openalex.org/W2896983500","https://openalex.org/W2903640996","https://openalex.org/W2914968962","https://openalex.org/W2919115771"],"related_works":["https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2789349722","https://openalex.org/W1985308002","https://openalex.org/W2056896932","https://openalex.org/W2614722573","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W2059422871","https://openalex.org/W2041787842"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"a":[3,8,52],"simplified":[4],"hardware":[5,34],"implementation":[6],"of":[7,23,40,77],"CNN":[9],"softmax":[10,16],"layer":[11],"is":[12,19,36],"proposed.":[13,30],"Initially":[14],"the":[15,32,41,46],"activation":[17],"function":[18],"analyzed":[20],"in":[21,38,51,75],"terms":[22,39,76],"required":[24],"accuracy":[25],"and":[26,70],"certain":[27,73],"optimizations":[28],"are":[29,49,87],"Subsequently":[31],"proposed":[33,47],"architecture":[35],"evaluated":[37],"introduced":[42],"approximation":[43],"error.":[44],"Finally":[45],"circuits":[48],"synthesized":[50],"90-nm":[53],"1.0":[54],"V":[55],"CMOS":[56],"standard-cell":[57],"library":[58],"using":[59],"Synopsys":[60],"Design":[61],"Compiler.":[62],"Comparisons":[63],"reveal":[64],"significant":[65],"reduction":[66],"up":[67],"to":[68],"47%":[69],"43%":[71],"for":[72],"cases,":[74],"area":[78],"\u00d7":[79],"delay":[80],"product":[81],"over":[82],"prior":[83],"art.":[84],"Area":[85],"savings":[86],"achieved":[88],"with":[89],"no":[90],"performance":[91],"penalty.":[92]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":13},{"year":2024,"cited_by_count":14},{"year":2023,"cited_by_count":25},{"year":2022,"cited_by_count":15},{"year":2021,"cited_by_count":14},{"year":2020,"cited_by_count":13}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
