{"id":"https://openalex.org/W4400411995","doi":"https://doi.org/10.1109/mm.2024.3414941","title":"Simultaneous and Heterogenous Multithreading: Exploiting Simultaneous and Heterogeneous Parallelism in Accelerator-Rich Architectures","display_name":"Simultaneous and Heterogenous Multithreading: Exploiting Simultaneous and Heterogeneous Parallelism in Accelerator-Rich Architectures","publication_year":2024,"publication_date":"2024-07-01","ids":{"openalex":"https://openalex.org/W4400411995","doi":"https://doi.org/10.1109/mm.2024.3414941"},"language":"en","primary_location":{"id":"doi:10.1109/mm.2024.3414941","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mm.2024.3414941","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066332639","display_name":"Kuan-Chieh Hsu","orcid":"https://orcid.org/0009-0002-4285-9588"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kuan-Chieh Hsu","raw_affiliation_strings":["University of California, Riverside, Riverside, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077363344","display_name":"Hung\u2010Wei Tseng","orcid":"https://orcid.org/0000-0001-8383-5203"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hung-Wei Tseng","raw_affiliation_strings":["University of California, Riverside, Riverside, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5066332639"],"corresponding_institution_ids":["https://openalex.org/I103635307"],"apc_list":null,"apc_paid":null,"fwci":0.5198,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60423848,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"44","issue":"4","first_page":"11","last_page":"19"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8710035085678101},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.6717057228088379},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.628685474395752},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4676510691642761},{"id":"https://openalex.org/keywords/task-parallelism","display_name":"Task parallelism","score":0.4585563540458679},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.4578098654747009},{"id":"https://openalex.org/keywords/data-parallelism","display_name":"Data parallelism","score":0.4381096661090851}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8710035085678101},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.6717057228088379},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.628685474395752},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4676510691642761},{"id":"https://openalex.org/C42992933","wikidata":"https://www.wikidata.org/wiki/Q691169","display_name":"Task parallelism","level":3,"score":0.4585563540458679},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.4578098654747009},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.4381096661090851}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mm.2024.3414941","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mm.2024.3414941","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3268968919","display_name":null,"funder_award_id":"CNS-2007124","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G3885993782","display_name":null,"funder_award_id":"CNS-2231877","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2187230075","https://openalex.org/W2411972054","https://openalex.org/W2901549770","https://openalex.org/W2955738001","https://openalex.org/W3104528661","https://openalex.org/W3206916567","https://openalex.org/W4225869830","https://openalex.org/W4318620922","https://openalex.org/W4380874786"],"related_works":["https://openalex.org/W2950520577","https://openalex.org/W2003935582","https://openalex.org/W1501159154","https://openalex.org/W2468095077","https://openalex.org/W74409296","https://openalex.org/W2009213655","https://openalex.org/W1991844655","https://openalex.org/W2105992728","https://openalex.org/W1229628","https://openalex.org/W2494130044"],"abstract_inverted_index":{"The":[0],"addition":[1],"of":[2,33,98,120],"domain-specific":[3],"hardware":[4],"accelerators":[5],"and":[6,12,24,54,61,86,126,137],"general-purpose":[7],"processors":[8],"that":[9,47,64,111],"support":[10,115],"vector":[11],"scalar":[13],"models":[14,23],"makes":[15],"modern":[16],"computers":[17],"undoubtedly":[18],"heterogeneous.":[19],"However,":[20],"existing":[21],"programming":[22,60],"runtime":[25,88],"systems":[26],"target":[27],"using":[28],"the":[29,44,95,106,118,121],"most":[30],"efficient":[31],"category":[32],"processing":[34,49,69,113,141],"units":[35,50,70,114],"to":[36,77,90,103,116],"delegate":[37],"computation":[38,72],"from":[39,73],"each":[40],"code":[41,75],"region,":[42],"undermining":[43],"potential":[45],"parallelism":[46],"heterogeneous":[48,68,80],"can":[51],"provide.":[52],"Simultaneous":[53],"heterogenous":[55],"multithreading":[56],"(SHMT)":[57],"is":[58],"a":[59,74,87,135],"execution":[62],"model":[63],"activates":[65],"all":[66],"possible":[67],"for":[71],"region":[76],"enable":[78],"\u201creal\u201d":[79],"parallelism.":[81],"SHMT":[82,100,128],"presents":[83],"an":[84,130,138],"abstraction":[85],"system":[89,132],"facilitate":[91],"parallel":[92],"execution.":[93],"Despite":[94],"new":[96],"type":[97],"parallelism,":[99],"also":[101],"needs":[102],"additionally":[104],"address":[105],"heterogeneity":[107],"in":[108],"data":[109],"precision":[110],"various":[112],"ensure":[117],"quality":[119],"result.":[122],"This":[123],"article":[124],"implements":[125],"evaluates":[127],"on":[129],"embedded":[131],"platform":[133],"with":[134],"GPU":[136],"edge":[139],"tensor":[140],"unit.":[142]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-12-26T23:08:49.675405","created_date":"2024-07-09T00:00:00"}
