{"id":"https://openalex.org/W3166510811","doi":"https://doi.org/10.1109/mm.2021.3085578","title":"Kunpeng 920: The First 7-nm Chiplet-Based 64-Core ARM SoC for Cloud Services","display_name":"Kunpeng 920: The First 7-nm Chiplet-Based 64-Core ARM SoC for Cloud Services","publication_year":2021,"publication_date":"2021-06-01","ids":{"openalex":"https://openalex.org/W3166510811","doi":"https://doi.org/10.1109/mm.2021.3085578","mag":"3166510811"},"language":"en","primary_location":{"id":"doi:10.1109/mm.2021.3085578","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mm.2021.3085578","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065095276","display_name":"Jing Xia","orcid":"https://orcid.org/0000-0001-5245-562X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jing Xia","raw_affiliation_strings":["HiSilicon Technologies Company, Ltd., Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"HiSilicon Technologies Company, Ltd., Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052224611","display_name":"Chuanning Cheng","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chuanning Cheng","raw_affiliation_strings":["HiSilicon Technologies Company, Ltd., Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"HiSilicon Technologies Company, Ltd., Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054361465","display_name":"Zhou Xi-ping","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Xiping Zhou","raw_affiliation_strings":["HiSilicon Technologies Company, Ltd., Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"HiSilicon Technologies Company, Ltd., Shenzhen, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030342330","display_name":"Yuxing Hu","orcid":"https://orcid.org/0000-0001-9238-1071"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yuxing Hu","raw_affiliation_strings":["HiSilicon Technologies Company, Ltd., Shenzhen, China"],"raw_orcid":"https://orcid.org/0000-0001-9238-1071","affiliations":[{"raw_affiliation_string":"HiSilicon Technologies Company, Ltd., Shenzhen, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089420850","display_name":"Peter Chun","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Peter Chun","raw_affiliation_strings":["HiSilicon Technologies Company, Ltd., Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"HiSilicon Technologies Company, Ltd., Shenzhen, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":14.3943,"has_fulltext":false,"cited_by_count":93,"citation_normalized_percentile":{"value":0.99464012,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"41","issue":"5","first_page":"67","last_page":"75"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8536211252212524},{"id":"https://openalex.org/keywords/chipset","display_name":"Chipset","score":0.652318000793457},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46350330114364624},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.45315197110176086},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.43278640508651733},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.4264174699783325},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3734997510910034},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35948580503463745},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.324821799993515},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2081061601638794}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8536211252212524},{"id":"https://openalex.org/C73431340","wikidata":"https://www.wikidata.org/wiki/Q182656","display_name":"Chipset","level":3,"score":0.652318000793457},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46350330114364624},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.45315197110176086},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.43278640508651733},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.4264174699783325},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3734997510910034},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35948580503463745},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.324821799993515},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2081061601638794},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mm.2021.3085578","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mm.2021.3085578","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5299999713897705}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2144476064","https://openalex.org/W2160610190"],"related_works":["https://openalex.org/W2589477535","https://openalex.org/W2580827097","https://openalex.org/W2383721646","https://openalex.org/W2370062118","https://openalex.org/W2362222286","https://openalex.org/W2997147979","https://openalex.org/W2390551782","https://openalex.org/W3094920005","https://openalex.org/W2389537118","https://openalex.org/W2374444867"],"abstract_inverted_index":{"Kunpeng":[0,15,50,76,184],"920":[1,16,77,185],"is":[2,17,79,103,120,133,149],"the":[3,86,99,156,168],"second":[4],"generation":[5],"server":[6],"processor":[7],"designed":[8,81],"by":[9],"HiSilicon":[10],"based":[11],"on":[12,170],"ARM":[13],"architecture.":[14],"able":[18],"to":[19,46,59,91,105,135,165],"achieve":[20,136],"cost":[21],"efficiency":[22],"for":[23,95,143],"various":[24,57],"workloads":[25],"through":[26],"using":[27],"a":[28,116,128,171],"variety":[29],"of":[30,39,88],"chiplets":[31],"and":[32,64,67,126,174],"hybrid":[33],"process":[34,113],"technologies.":[35],"The":[36,49,75],"unique":[37],"recomposition(s)":[38],"these":[40],"flexible":[41],"chipsets":[42],"allows":[43],"new":[44],"designs":[45],"be":[47,163],"created.":[48],"series":[51],"processors":[52],"combine":[53],"technology":[54],"innovations":[55],"from":[56],"levels":[58],"improve":[60],"efficiency,":[61],"eliminate":[62],"bottlenecks,":[63],"deliver":[65],"value":[66],"performance.":[68],"Its":[69],"key":[70],"features":[71,94],"are":[72],"as":[73,189],"follows:":[74],"core":[78],"specifically":[80],"with":[82,85,115,177,194],"superscalar":[83],"architecture":[84],"support":[87],"vector":[89],"extension":[90],"provide":[92],"leading":[93],"high-performance":[96],"computing":[97],"applications;":[98],"coherent":[100,196],"cache":[101,195],"subsystem":[102],"created":[104],"integrate":[106],"multicores":[107],"into":[108],"single":[109,190],"chiplet":[110],"(e.g.,":[111,138,151,160],"7-nm":[112],"node)":[114],"ring":[117],"design":[118],"that":[119,155],"ultralow-latency":[121],"(<;":[122],"15":[123],"ns),":[124],"nonblocking":[125],"bufferless;":[127],"dedicated":[129],"parallel":[130],"small-IO":[131],"block":[132],"developed":[134],"high-bandwidth":[137],"400":[139],"GB/s)":[140],"interdie":[141],"connection":[142],"2-D":[144],"package":[145],"solutions;":[146],"IO":[147,179],"die":[148],"redesigned":[150],"16-nm":[152],"process)":[153],"so":[154],"latest":[157],"standard":[158],"interface":[159],"PCI4.0)":[161],"can":[162,186],"leveraged":[164],"scale":[166],"up":[167],"System":[169],"Chip":[172],"(SoCs)":[173],"connect":[175],"them":[176],"other":[178],"devices;":[180],"two":[181],"or":[182],"four":[183],"work":[187],"together":[188],"symmetric":[191],"multiprocessor":[192],"system":[193],"nonuniform":[197],"memory":[198],"access":[199],"fabric.":[200]},"counts_by_year":[{"year":2026,"cited_by_count":8},{"year":2025,"cited_by_count":24},{"year":2024,"cited_by_count":33},{"year":2023,"cited_by_count":14},{"year":2022,"cited_by_count":12},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}