{"id":"https://openalex.org/W3028955404","doi":"https://doi.org/10.1109/mm.2020.2998435","title":"SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs","display_name":"SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs","publication_year":2020,"publication_date":"2020-05-28","ids":{"openalex":"https://openalex.org/W3028955404","doi":"https://doi.org/10.1109/mm.2020.2998435","mag":"3028955404"},"language":"en","primary_location":{"id":"doi:10.1109/mm.2020.2998435","is_oa":true,"landing_page_url":"https://doi.org/10.1109/mm.2020.2998435","pdf_url":"https://ieeexplore.ieee.org/ielx7/40/9130972/09103284.pdf","source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://ieeexplore.ieee.org/ielx7/40/9130972/09103284.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086554824","display_name":"Kevin E. Murray","orcid":"https://orcid.org/0000-0002-8151-8359"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Kevin E. Murray","raw_affiliation_strings":["University of Toronto"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063878178","display_name":"Mohamed A. Elgammal","orcid":"https://orcid.org/0000-0001-8555-7331"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mohamed A. Elgammal","raw_affiliation_strings":["University of Toronto"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030184404","display_name":"Vaughn Betz","orcid":"https://orcid.org/0000-0003-0528-6493"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Vaughn Betz","raw_affiliation_strings":["University of Toronto"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019597978","display_name":"Tim Ansell","orcid":"https://orcid.org/0000-0002-4179-8376"},"institutions":[{"id":"https://openalex.org/I1291425158","display_name":"Google (United States)","ror":"https://ror.org/00njsd438","country_code":"US","type":"company","lineage":["https://openalex.org/I1291425158","https://openalex.org/I4210128969"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tim Ansell","raw_affiliation_strings":["Google"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Google","institution_ids":["https://openalex.org/I1291425158"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037119847","display_name":"Keith Rothman","orcid":null},"institutions":[{"id":"https://openalex.org/I1291425158","display_name":"Google (United States)","ror":"https://ror.org/00njsd438","country_code":"US","type":"company","lineage":["https://openalex.org/I1291425158","https://openalex.org/I4210128969"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Keith Rothman","raw_affiliation_strings":["Google"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Google","institution_ids":["https://openalex.org/I1291425158"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031817709","display_name":"Alessandro Comodi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Alessandro Comodi","raw_affiliation_strings":["Antmicro"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Antmicro","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5086554824"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":3.121,"has_fulltext":true,"cited_by_count":41,"citation_normalized_percentile":{"value":0.92169453,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"40","issue":"4","first_page":"49","last_page":"57"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12452","display_name":"Electrowetting and Microfluidic Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8809337615966797},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8485956192016602},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6407315731048584},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6216375827789307},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5743157267570496},{"id":"https://openalex.org/keywords/vendor","display_name":"Vendor","score":0.5680112838745117},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.536408007144928},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5007455348968506},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4150720238685608},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35425111651420593}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8809337615966797},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8485956192016602},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6407315731048584},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6216375827789307},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5743157267570496},{"id":"https://openalex.org/C2777338717","wikidata":"https://www.wikidata.org/wiki/Q1762621","display_name":"Vendor","level":2,"score":0.5680112838745117},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.536408007144928},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5007455348968506},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4150720238685608},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35425111651420593},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mm.2020.2998435","is_oa":true,"landing_page_url":"https://doi.org/10.1109/mm.2020.2998435","pdf_url":"https://ieeexplore.ieee.org/ielx7/40/9130972/09103284.pdf","source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/mm.2020.2998435","is_oa":true,"landing_page_url":"https://doi.org/10.1109/mm.2020.2998435","pdf_url":"https://ieeexplore.ieee.org/ielx7/40/9130972/09103284.pdf","source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.5099999904632568,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309327","display_name":"Google","ror":"https://ror.org/00njsd438"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3028955404.pdf","grobid_xml":"https://content.openalex.org/works/W3028955404.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W1969466278","https://openalex.org/W2023428606","https://openalex.org/W2124402195","https://openalex.org/W2145897936","https://openalex.org/W2171768221","https://openalex.org/W2264331490","https://openalex.org/W2891839221","https://openalex.org/W2949216549","https://openalex.org/W2951749218","https://openalex.org/W3033033241"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W2091330445","https://openalex.org/W2038220260","https://openalex.org/W1967938402","https://openalex.org/W3164085601","https://openalex.org/W2126857316","https://openalex.org/W1522032972","https://openalex.org/W4245257593"],"abstract_inverted_index":{"As":[0],"the":[1,26,46,59,117,139],"benefits":[2,47],"of":[3,21,48,119],"Moore's":[4],"Law":[5],"diminish,":[6],"computing":[7],"performance,":[8],"and":[9,29,79,97,105,121,126,138,144],"efficiency":[10],"gains":[11],"are":[12,77],"increasingly":[13],"achieved":[14],"through":[15],"specializing":[16],"hardware":[17],"to":[18,40,55,65,82,101,142,148],"a":[19,68,83,132],"domain":[20],"computation.":[22],"However,":[23],"this":[24,114],"limits":[25],"hardware's":[27],"generality":[28],"flexibility.":[30],"Field-programmable":[31],"gate":[32],"arrays":[33],"(FPGAs),":[34],"microchips":[35],"which":[36,93],"can":[37],"be":[38],"reprogrammed":[39],"implement":[41],"arbitrary":[42],"digital":[43],"circuits,":[44],"enable":[45],"specialization":[49],"while":[50],"remaining":[51],"flexible.":[52],"A":[53],"challenge":[54],"using":[56],"FPGAs":[57],"is":[58],"complex":[60],"computer-aided":[61],"design":[62,75],"flow":[63],"required":[64],"efficiently":[66],"map":[67],"computation":[69],"onto":[70],"an":[71,89],"FPGA.":[72],"Traditionally,":[73],"these":[74],"flows":[76],"closed-source":[78],"highly":[80,95],"specialized":[81],"particular":[84],"vendor's":[85],"devices.":[86],"We":[87],"propose":[88],"alternate":[90],"data-driven":[91],"approach,":[92],"uses":[94],"adaptable":[96],"retargettable":[98],"open-source":[99,140],"tools":[100],"target":[102],"both":[103],"commercial":[104,122],"research":[106],"FPGA":[107,123,150],"architectures.":[108],"While":[109],"challenges":[110],"remain,":[111],"we":[112],"believe":[113],"approach":[115],"makes":[116],"development":[118],"novel":[120],"architectures":[124],"faster":[125],"more":[127],"accessible.":[128],"Furthermore,":[129],"it":[130],"provides":[131],"path":[133],"forward":[134],"for":[135],"industry,":[136],"academia,":[137],"community":[141],"collaborate":[143],"combine":[145],"their":[146],"resources":[147],"advance":[149],"technology.":[151]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":12},{"year":2020,"cited_by_count":1}],"updated_date":"2026-04-25T08:17:42.794288","created_date":"2025-10-10T00:00:00"}
