{"id":"https://openalex.org/W2798724095","doi":"https://doi.org/10.1109/mm.2018.022071134","title":"Volta: Performance and Programmability","display_name":"Volta: Performance and Programmability","publication_year":2018,"publication_date":"2018-03-01","ids":{"openalex":"https://openalex.org/W2798724095","doi":"https://doi.org/10.1109/mm.2018.022071134","mag":"2798724095"},"language":"en","primary_location":{"id":"doi:10.1109/mm.2018.022071134","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mm.2018.022071134","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082568014","display_name":"Jack Choquette","orcid":"https://orcid.org/0000-0002-3282-6777"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Jack Choquette","raw_affiliation_strings":["NVIDIA"],"affiliations":[{"raw_affiliation_string":"NVIDIA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083397443","display_name":"Olivier Giroux","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Olivier Giroux","raw_affiliation_strings":["NVIDIA"],"affiliations":[{"raw_affiliation_string":"NVIDIA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005956106","display_name":"Denis Foley","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Denis Foley","raw_affiliation_strings":["NVIDIA"],"affiliations":[{"raw_affiliation_string":"NVIDIA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5082568014"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":15.9055,"has_fulltext":false,"cited_by_count":123,"citation_normalized_percentile":{"value":0.9956001,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":"38","issue":"2","first_page":"42","last_page":"52"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.88866126537323},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.7785382270812988},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6376539468765259},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5986369252204895},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5644963979721069},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5509219169616699},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.47806456685066223},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4265536963939667},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3474140763282776},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2931585907936096}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.88866126537323},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.7785382270812988},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6376539468765259},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5986369252204895},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5644963979721069},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5509219169616699},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.47806456685066223},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4265536963939667},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3474140763282776},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2931585907936096},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mm.2018.022071134","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mm.2018.022071134","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Micro","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5699999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1516270816","https://openalex.org/W1991300218","https://openalex.org/W2045271686","https://openalex.org/W2155503253","https://openalex.org/W6630693383"],"related_works":["https://openalex.org/W122453572","https://openalex.org/W2545964721","https://openalex.org/W4250432526","https://openalex.org/W2500040382","https://openalex.org/W1998013902","https://openalex.org/W2101536355","https://openalex.org/W2550108858","https://openalex.org/W1980898636","https://openalex.org/W2045325972","https://openalex.org/W2141090099"],"abstract_inverted_index":{"GV100":[0,41],"is":[1],"NVIDIAs":[2],"latest":[3],"flagship":[4],"GPU.":[5],"It":[6,18],"has":[7],"been":[8],"designed":[9],"with":[10],"many":[11],"features":[12,19],"to":[13,21,33],"improve":[14],"performance":[15],"and":[16,28],"programmability.":[17],"enhancements":[20,32],"NVLink,":[22],"a":[23],"redesigned":[24],"streaming":[25],"microprocessor":[26],"(SM),":[27],"independent":[29],"thread":[30],"scheduling":[31],"the":[34],"single":[35],"instruction,":[36],"multiple":[37],"threads":[38],"(SIMT)":[39],"model.":[40],"also":[42],"adds":[43],"new":[44],"tensor":[45],"cores":[46],"for":[47,54],"an":[48],"order":[49],"of":[50],"magnitude":[51],"throughput":[52],"improvement":[53],"deep-learning":[55],"kernels.":[56]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":11},{"year":2024,"cited_by_count":19},{"year":2023,"cited_by_count":15},{"year":2022,"cited_by_count":14},{"year":2021,"cited_by_count":20},{"year":2020,"cited_by_count":22},{"year":2019,"cited_by_count":17},{"year":2018,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}