{"id":"https://openalex.org/W2488969320","doi":"https://doi.org/10.1109/mixdes.2016.7529719","title":"A new class-AB Flipped Voltage Follower using a common-gate auxiliary amplifier","display_name":"A new class-AB Flipped Voltage Follower using a common-gate auxiliary amplifier","publication_year":2016,"publication_date":"2016-06-01","ids":{"openalex":"https://openalex.org/W2488969320","doi":"https://doi.org/10.1109/mixdes.2016.7529719","mag":"2488969320"},"language":"en","primary_location":{"id":"doi:10.1109/mixdes.2016.7529719","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2016.7529719","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030782483","display_name":"Francesco Centurelli","orcid":"https://orcid.org/0000-0003-3880-2546"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Francesco Centurelli","raw_affiliation_strings":["Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070430111","display_name":"Pietro Monsurr\u00f2","orcid":"https://orcid.org/0000-0002-3821-6566"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Pietro Monsurro","raw_affiliation_strings":["Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013598835","display_name":"D. Ruscio","orcid":null},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Danilo Ruscio","raw_affiliation_strings":["Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Trifiletti","raw_affiliation_strings":["Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information, Electronic and Telecommunications Engineering, University of Rome Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5030782483"],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":0.5128,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.67688398,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"143","last_page":"146"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/buffer-amplifier","display_name":"Buffer amplifier","score":0.7236698269844055},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6024766564369202},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.575054407119751},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5661309957504272},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.5087805390357971},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5059229731559753},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.49136677384376526},{"id":"https://openalex.org/keywords/capacitive-sensing","display_name":"Capacitive sensing","score":0.48737412691116333},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.4415718913078308},{"id":"https://openalex.org/keywords/output-impedance","display_name":"Output impedance","score":0.4283272624015808},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.42020943760871887},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4198625683784485},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4181487560272217},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41399669647216797},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33073776960372925},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13567209243774414},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.07375162839889526}],"concepts":[{"id":"https://openalex.org/C127749002","wikidata":"https://www.wikidata.org/wiki/Q978470","display_name":"Buffer amplifier","level":4,"score":0.7236698269844055},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6024766564369202},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.575054407119751},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5661309957504272},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.5087805390357971},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5059229731559753},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.49136677384376526},{"id":"https://openalex.org/C206755178","wikidata":"https://www.wikidata.org/wiki/Q1131271","display_name":"Capacitive sensing","level":2,"score":0.48737412691116333},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.4415718913078308},{"id":"https://openalex.org/C58112919","wikidata":"https://www.wikidata.org/wiki/Q631203","display_name":"Output impedance","level":3,"score":0.4283272624015808},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.42020943760871887},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4198625683784485},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4181487560272217},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41399669647216797},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33073776960372925},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13567209243774414},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.07375162839889526},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mixdes.2016.7529719","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2016.7529719","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/984914","is_oa":false,"landing_page_url":"http://hdl.handle.net/11573/984914","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1526522449","https://openalex.org/W1990677055","https://openalex.org/W2003843809","https://openalex.org/W2096668447","https://openalex.org/W2131189523","https://openalex.org/W2157299857","https://openalex.org/W2170862407","https://openalex.org/W4241762854"],"related_works":["https://openalex.org/W2110922327","https://openalex.org/W4392638485","https://openalex.org/W2007302850","https://openalex.org/W2184605757","https://openalex.org/W3004991521","https://openalex.org/W2001213361","https://openalex.org/W834006155","https://openalex.org/W2147557529","https://openalex.org/W2588437499","https://openalex.org/W2068960068"],"abstract_inverted_index":{"A":[0],"novel":[1],"class-AB":[2],"Flipped":[3,30],"Voltage":[4,31],"Follower":[5,32],"is":[6],"proposed,":[7],"suitable":[8],"for":[9,25],"low-voltage":[10],"low-power":[11],"CMOS":[12],"implementation":[13],"in":[14],"advanced":[15],"technology":[16],"nodes.":[17],"Simulations":[18],"have":[19],"been":[20],"performed":[21],"using":[22],"STMicroelectronics":[23],"models":[24],"the":[26,48],"45nm":[27],"technology.":[28],"The":[29],"allows":[33],"low":[34],"output":[35],"impedance":[36],"and":[37],"high":[38],"linearity":[39],"by":[40],"means":[41],"of":[42],"a":[43],"feedback":[44],"loop.":[45],"However,":[46],"like":[47],"conventional":[49],"common-drain":[50],"voltage":[51],"follower,":[52],"it":[53],"has":[54],"class-A":[55],"behavior.":[56],"Class-AB":[57],"behavior":[58],"enables":[59],"faster":[60],"settling":[61],"with":[62],"large":[63],"capacitive":[64],"loads":[65],"and/or":[66],"lower":[67],"power":[68],"consumption.":[69]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
