{"id":"https://openalex.org/W2481657956","doi":"https://doi.org/10.1109/mixdes.2016.7529700","title":"Verilog-A compact model of integrated tapered spiral inductors","display_name":"Verilog-A compact model of integrated tapered spiral inductors","publication_year":2016,"publication_date":"2016-06-01","ids":{"openalex":"https://openalex.org/W2481657956","doi":"https://doi.org/10.1109/mixdes.2016.7529700","mag":"2481657956"},"language":"en","primary_location":{"id":"doi:10.1109/mixdes.2016.7529700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2016.7529700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062362606","display_name":"M. Helena Fino","orcid":"https://orcid.org/0000-0003-3884-0059"},"institutions":[{"id":"https://openalex.org/I83558840","display_name":"Universidade Nova de Lisboa","ror":"https://ror.org/02xankh89","country_code":"PT","type":"education","lineage":["https://openalex.org/I83558840"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Maria Helena Fino","raw_affiliation_strings":["FCT, Universidade Nova de Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"FCT, Universidade Nova de Lisboa, Portugal","institution_ids":["https://openalex.org/I83558840"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5062362606"],"corresponding_institution_ids":["https://openalex.org/I83558840"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.05518487,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"58","last_page":"61"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.8895822763442993},{"id":"https://openalex.org/keywords/transistor-model","display_name":"Transistor model","score":0.6212934255599976},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.5845224857330322},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5750280618667603},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5127447843551636},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4896274209022522},{"id":"https://openalex.org/keywords/solid-modeling","display_name":"Solid modeling","score":0.47432443499565125},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.46736451983451843},{"id":"https://openalex.org/keywords/spiral","display_name":"Spiral (railway)","score":0.45031052827835083},{"id":"https://openalex.org/keywords/radio-frequency","display_name":"Radio frequency","score":0.4136985242366791},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.39515653252601624},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33970698714256287},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.325044184923172},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.1301727592945099},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.11365851759910583}],"concepts":[{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.8895822763442993},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.6212934255599976},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.5845224857330322},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5750280618667603},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5127447843551636},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4896274209022522},{"id":"https://openalex.org/C108882727","wikidata":"https://www.wikidata.org/wiki/Q2991685","display_name":"Solid modeling","level":2,"score":0.47432443499565125},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.46736451983451843},{"id":"https://openalex.org/C174128100","wikidata":"https://www.wikidata.org/wiki/Q846907","display_name":"Spiral (railway)","level":2,"score":0.45031052827835083},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.4136985242366791},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.39515653252601624},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33970698714256287},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.325044184923172},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.1301727592945099},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.11365851759910583},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mixdes.2016.7529700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2016.7529700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1970165438","https://openalex.org/W1990893886","https://openalex.org/W1992848420","https://openalex.org/W2006778264","https://openalex.org/W2017092770","https://openalex.org/W2079039634","https://openalex.org/W2097941400","https://openalex.org/W2111307353","https://openalex.org/W2160428624","https://openalex.org/W2165951262"],"related_works":["https://openalex.org/W4289538008","https://openalex.org/W3186427148","https://openalex.org/W2138282914","https://openalex.org/W2065850627","https://openalex.org/W2017012638","https://openalex.org/W1966793535","https://openalex.org/W2071885361","https://openalex.org/W1964447062","https://openalex.org/W1978219043","https://openalex.org/W1601841351"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"Verilog-A":[4],"compact":[5],"model":[6,13,34,46,50],"for":[7],"integrated":[8,52],"spiral":[9],"inductors.":[10],"The":[11,30,49],"implemented":[12],"takes":[14],"into":[15,53],"consideration":[16],"the":[17,21,27,33,45,57,59,63,67,82,86,89,97],"geometric":[18],"parameters":[19],"characterizing":[20],"inductor":[22,64,87],"layout,":[23],"as":[24,26,77],"well":[25],"technological":[28],"parameters.":[29],"accuracy":[31],"of":[32,44,72,84],"is":[35,51,94],"checked":[36],"against":[37],"simulations":[38],"with":[39],"ASITIC":[40],"simulator":[41],"and":[42,88],"limitations":[43],"are":[47],"established.":[48],"Cadence":[54],"environment,":[55],"offering":[56],"designer":[58],"possibility":[60],"to":[61,96],"obtain":[62],"design":[65],"using":[66],"optimization":[68],"tools.":[69],"Moreover,":[70],"simulation":[71],"radio":[73],"frequency":[74],"blocks":[75],"such":[76],"voltage":[78],"controlled":[79],"oscillators,":[80],"considering":[81],"non-idealities":[83],"both":[85],"transistors":[90],"in":[91],"deep-submicron":[92],"technologies":[93],"offered":[95],"designers.":[98]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
