{"id":"https://openalex.org/W1593715375","doi":"https://doi.org/10.1109/mixdes.2015.7208532","title":"Design for the testability of the multichannel neural recording and stimulating integrated circuit","display_name":"Design for the testability of the multichannel neural recording and stimulating integrated circuit","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1593715375","doi":"https://doi.org/10.1109/mixdes.2015.7208532","mag":"1593715375"},"language":"en","primary_location":{"id":"doi:10.1109/mixdes.2015.7208532","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2015.7208532","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 22nd International Conference Mixed Design of Integrated Circuits &amp; Systems (MIXDES)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081992816","display_name":"Piotr Kmon","orcid":"https://orcid.org/0000-0002-2588-6763"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Piotr Kmon","raw_affiliation_strings":["AGH University of Science and Technology, Krakow, Poland","AGH Univ. of Science and Technology, Krakow, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]},{"raw_affiliation_string":"AGH Univ. of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064927265","display_name":"Piotr Otfinowski","orcid":"https://orcid.org/0000-0001-8000-202X"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Piotr Otfinowski","raw_affiliation_strings":["Akademia Gorniczo-Hutnicza imienia Stanislawa Staszica w Krakowie, Krakow, Wojew\u00c3\u00b3dztwo ma\u00c5\u201aopolskie, PL","AGH Univ. of Science and Technology, Krakow, Poland"],"affiliations":[{"raw_affiliation_string":"Akademia Gorniczo-Hutnicza imienia Stanislawa Staszica w Krakowie, Krakow, Wojew\u00c3\u00b3dztwo ma\u00c5\u201aopolskie, PL","institution_ids":[]},{"raw_affiliation_string":"AGH Univ. of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060830638","display_name":"P. Grybo\u015b","orcid":"https://orcid.org/0000-0003-2446-9033"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Pawel Grybos","raw_affiliation_strings":["AGH University of Science and Technology, Krakow, Poland","AGH Univ. of Science and Technology, Krakow, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]},{"raw_affiliation_string":"AGH Univ. of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042247728","display_name":"R. Szczygie\u0142","orcid":"https://orcid.org/0000-0001-6342-0107"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Robert Szczygiel","raw_affiliation_strings":["AGH University of Science and Technology, Krakow, Poland","AGH Univ. of Science and Technology, Krakow, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]},{"raw_affiliation_string":"AGH Univ. of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011817378","display_name":"M. \u017bo\u0142\u0105d\u017a","orcid":"https://orcid.org/0000-0003-0791-9880"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Miroslaw Zoladz","raw_affiliation_strings":["AGH University of Science and Technology, Krakow, Poland","AGH Univ. of Science and Technology, Krakow, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]},{"raw_affiliation_string":"AGH Univ. of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003716095","display_name":"Agnieszka Lisicka","orcid":null},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Agnieszka Lisicka","raw_affiliation_strings":["AGH University of Science and Technology, Krakow, Poland","AGH Univ. of Science and Technology, Krakow, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]},{"raw_affiliation_string":"AGH Univ. of Science and Technology, Krakow, Poland","institution_ids":["https://openalex.org/I686019"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5081992816"],"corresponding_institution_ids":["https://openalex.org/I686019"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02899027,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"305","last_page":"308"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},"topics":[{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10429","display_name":"EEG and Brain-Computer Interfaces","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.8164482116699219},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6307586431503296},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5960522890090942},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.587792694568634},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5579626560211182},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.527360737323761},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5241772532463074},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.5225457549095154},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4882209599018097},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.4475909173488617},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.4419293701648712},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4284307360649109},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.4219362735748291},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41652172803878784},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.37340468168258667},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.3111226558685303},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23804351687431335},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21957308053970337},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18090656399726868},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14217951893806458},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08516299724578857}],"concepts":[{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.8164482116699219},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6307586431503296},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5960522890090942},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.587792694568634},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5579626560211182},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.527360737323761},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5241772532463074},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.5225457549095154},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4882209599018097},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.4475909173488617},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.4419293701648712},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4284307360649109},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.4219362735748291},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41652172803878784},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.37340468168258667},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.3111226558685303},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23804351687431335},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21957308053970337},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18090656399726868},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14217951893806458},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08516299724578857},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mixdes.2015.7208532","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2015.7208532","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 22nd International Conference Mixed Design of Integrated Circuits &amp; Systems (MIXDES)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1984566507","https://openalex.org/W2005807222","https://openalex.org/W2036366357","https://openalex.org/W2054295738","https://openalex.org/W2087354392","https://openalex.org/W2087704839","https://openalex.org/W2088469166","https://openalex.org/W2106730177","https://openalex.org/W2112098336","https://openalex.org/W2117018945","https://openalex.org/W2146216888","https://openalex.org/W6646439823"],"related_works":["https://openalex.org/W2107525390","https://openalex.org/W2157191248","https://openalex.org/W2150046587","https://openalex.org/W2142405811","https://openalex.org/W2114980936","https://openalex.org/W2164493372","https://openalex.org/W1594445436","https://openalex.org/W2128920253","https://openalex.org/W2164349885","https://openalex.org/W1768820276"],"abstract_inverted_index":{"We":[0],"report":[1],"on":[2,88],"design":[3,89],"of":[4,39,44,48,57,90,93],"the":[5,49,52],"100":[6],"channel":[7],"integrated":[8,53],"circuit":[9,54],"(10\u00d710":[10],"pixel":[11],"matrix)":[12],"destined":[13],"to":[14,22,97],"complex":[15],"neurobiology":[16],"experiments.":[17],"The":[18,69,85,101],"chip":[19,70],"is":[20,55,71],"dedicated":[21],"both":[23,40,45],"recording":[24],"and":[25,29,42,65,77,107],"stimulating":[26],"neural":[27],"activity":[28],"its":[30,35,99,108],"predominant":[31],"attributes":[32],"comes":[33],"from":[34],"individual":[36],"digital":[37],"control":[38],"blocks":[41,104],"allocation":[43],"in":[46,73,95],"each":[47],"pixel.":[50],"Additionally,":[51],"composed":[56],"RAM,":[58],"ADC,":[59],"bandgap":[60],"reference,":[61],"programmable":[62,66],"analog":[63],"multiplexer":[64],"biasing":[67],"block.":[68],"designed":[72],"CMOS":[74],"180mn":[75],"process":[76],"occupies":[78],"5\u00d75":[79],"mm":[80],"<sup":[81],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[82],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[83],".":[84],"paper":[86],"focuses":[87],"these":[91],"type":[92],"chips":[94],"order":[96],"facilitate":[98],"tests.":[100],"main":[102],"IC's":[103],"are":[105,111],"described":[106],"preliminary":[109],"measurements":[110],"shown.":[112]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
