{"id":"https://openalex.org/W1998983809","doi":"https://doi.org/10.1109/mixdes.2014.6872146","title":"Magnetic tunnel junctions for future memory and logic-in-memory applications","display_name":"Magnetic tunnel junctions for future memory and logic-in-memory applications","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W1998983809","doi":"https://doi.org/10.1109/mixdes.2014.6872146","mag":"1998983809"},"language":"en","primary_location":{"id":"doi:10.1109/mixdes.2014.6872146","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2014.6872146","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023885831","display_name":"Viktor Sverdlov","orcid":"https://orcid.org/0000-0003-1736-6976"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Viktor Sverdlov","raw_affiliation_strings":["Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]},{"raw_affiliation_string":"Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072413078","display_name":"Hiwa Mahmoudi","orcid":"https://orcid.org/0000-0003-1467-7007"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Hiwa Mahmoudi","raw_affiliation_strings":["Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]},{"raw_affiliation_string":"Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102991736","display_name":"Alexander Makarov","orcid":"https://orcid.org/0000-0002-9927-6511"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Alexander Makarov","raw_affiliation_strings":["Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]},{"raw_affiliation_string":"Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043510129","display_name":"S. Selberherr","orcid":"https://orcid.org/0000-0002-5583-6177"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Siegfried Selberherr","raw_affiliation_strings":["Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics, Technische Universita\u00e4t Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]},{"raw_affiliation_string":"Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I145847075"],"apc_list":null,"apc_paid":null,"fwci":1.0974,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.73199925,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"30","last_page":"33"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":1.0,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":1.0,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.7674545049667358},{"id":"https://openalex.org/keywords/spin-transfer-torque","display_name":"Spin-transfer torque","score":0.6166184544563293},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6051996946334839},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5449241399765015},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5297526121139526},{"id":"https://openalex.org/keywords/tunnel-magnetoresistance","display_name":"Tunnel magnetoresistance","score":0.5291270017623901},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5154045820236206},{"id":"https://openalex.org/keywords/magnetic-storage","display_name":"Magnetic storage","score":0.4278028607368469},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4239179491996765},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.41276153922080994},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4116078317165375},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39896589517593384},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3918635845184326},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.3560890555381775},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.35402512550354004},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.34716981649398804},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3407750129699707},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.27115482091903687},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.25818079710006714},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23455727100372314},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23178517818450928},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.15835973620414734},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.14471471309661865},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.14171835780143738},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1159808337688446},{"id":"https://openalex.org/keywords/magnetization","display_name":"Magnetization","score":0.10793513059616089}],"concepts":[{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.7674545049667358},{"id":"https://openalex.org/C609986","wikidata":"https://www.wikidata.org/wiki/Q844840","display_name":"Spin-transfer torque","level":4,"score":0.6166184544563293},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6051996946334839},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5449241399765015},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5297526121139526},{"id":"https://openalex.org/C56202322","wikidata":"https://www.wikidata.org/wiki/Q1884383","display_name":"Tunnel magnetoresistance","level":3,"score":0.5291270017623901},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5154045820236206},{"id":"https://openalex.org/C2778511666","wikidata":"https://www.wikidata.org/wiki/Q1364527","display_name":"Magnetic storage","level":2,"score":0.4278028607368469},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4239179491996765},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.41276153922080994},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4116078317165375},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39896589517593384},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3918635845184326},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.3560890555381775},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.35402512550354004},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.34716981649398804},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3407750129699707},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.27115482091903687},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.25818079710006714},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23455727100372314},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23178517818450928},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.15835973620414734},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.14471471309661865},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.14171835780143738},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1159808337688446},{"id":"https://openalex.org/C32546565","wikidata":"https://www.wikidata.org/wiki/Q856711","display_name":"Magnetization","level":3,"score":0.10793513059616089},{"id":"https://openalex.org/C115260700","wikidata":"https://www.wikidata.org/wiki/Q11408","display_name":"Magnetic field","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mixdes.2014.6872146","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mixdes.2014.6872146","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6299999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1964504828","https://openalex.org/W1967721797","https://openalex.org/W1969201306","https://openalex.org/W2014987330","https://openalex.org/W2015958908","https://openalex.org/W2032558960","https://openalex.org/W2035257891","https://openalex.org/W2045318207","https://openalex.org/W2080156339","https://openalex.org/W2087556742","https://openalex.org/W2102617527","https://openalex.org/W2105401464","https://openalex.org/W2126303524","https://openalex.org/W2144133653","https://openalex.org/W2951309030","https://openalex.org/W3146874818","https://openalex.org/W6641178286"],"related_works":["https://openalex.org/W2810772314","https://openalex.org/W2895351482","https://openalex.org/W1979059621","https://openalex.org/W196405497","https://openalex.org/W1566285984","https://openalex.org/W2949498821","https://openalex.org/W1993178305","https://openalex.org/W2942267901","https://openalex.org/W2921524283","https://openalex.org/W4235980920"],"abstract_inverted_index":{"Memories":[0],"based":[1,83],"on":[2,84],"charge":[3],"storage":[4],"are":[5,46,129],"gradually":[6],"approaching":[7],"the":[8,31,34,47,58,73,85,110],"physical":[9],"limits":[10],"of":[11,33,50,57,72,80,152,158],"scalability.":[12],"Magnetoresistive":[13],"random":[14],"access":[15],"memory":[16,52,94],"(MRAM)":[17],"with":[18],"spin-transfer":[19],"torque":[20],"(STT)":[21],"is":[22,66,89,96,106,162,170],"a":[23,69,143,171],"promising":[24,97],"candidate":[25],"for":[26,98,122,174],"future":[27],"universal":[28],"memory.":[29],"However,":[30],"reduction":[32],"switching":[35,39,59],"current":[36],"density":[37],"and/or":[38],"time":[40,60],"while":[41],"maintaining":[42],"high":[43,175],"thermal":[44,86],"stability":[45,87],"main":[48],"challenges":[49],"this":[51,81],"cell.":[53],"A":[54,149],"substantial":[55],"decrease":[56],"in":[61,155],"in-plane":[62],"magnetic":[63,75,136],"tunnel":[64,137],"junctions":[65],"achieved":[67],"by":[68,131],"special":[70],"design":[71],"free":[74],"layer.":[76],"The":[77,91,126,164],"scaling":[78],"potential":[79],"cell":[82,95],"analysis":[88,151,165],"discussed.":[90],"designed":[92],"non-volatile":[93,178],"STT-MRAM":[99],"arrays.":[100],"Introducing":[101],"non-volatility":[102],"into":[103],"logic":[104,123,127,140,160,169],"circuits":[105,118],"critical":[107,150],"to":[108],"reduce":[109],"standby":[111],"power":[112],"and":[113,134],"enable":[114],"instant-on":[115],"applications.":[116],"Recently,":[117],"containing":[119],"MRAM":[120],"cells":[121],"were":[124],"presented.":[125,163],"operations":[128],"implemented":[130],"using":[132],"reprogrammable-":[133],"implication-based":[135],"junction":[138],"(MTJ)":[139],"gates":[141],"providing":[142],"new":[144],"intrinsic":[145],"logic-in-memory":[146],"computational":[147],"platform.":[148],"possible":[153],"tradeoffs":[154],"different":[156],"designs":[157],"stateful":[159],"architectures":[161],"indicates":[166],"that":[167],"MRAM-based":[168],"well":[172],"suited":[173],"performance":[176],"parallel":[177],"computations.":[179]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
