{"id":"https://openalex.org/W4236372686","doi":"https://doi.org/10.1109/micro.2016.7783744","title":"Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation","display_name":"Concise loads and stores: The case for an asymmetric compute-memory architecture for approximation","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W4236372686","doi":"https://doi.org/10.1109/micro.2016.7783744"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2016.7783744","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2016.7783744","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041306152","display_name":"Animesh Jain","orcid":"https://orcid.org/0000-0003-0250-3608"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Animesh Jain","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112317980","display_name":"Parker Hill","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Parker Hill","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102763797","display_name":"Shih-Chieh Lin","orcid":"https://orcid.org/0000-0002-6671-9902"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shih-Chieh Lin","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073136757","display_name":"Muneeb Khan","orcid":"https://orcid.org/0000-0001-8961-1358"},"institutions":[{"id":"https://openalex.org/I123387679","display_name":"Uppsala University","ror":"https://ror.org/048a87296","country_code":"SE","type":"education","lineage":["https://openalex.org/I123387679"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Muneeb Khan","raw_affiliation_strings":["Uppsala University"],"affiliations":[{"raw_affiliation_string":"Uppsala University","institution_ids":["https://openalex.org/I123387679"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080959197","display_name":"Md Enamul Haque","orcid":"https://orcid.org/0000-0002-8893-2181"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Md E. Haque","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058184922","display_name":"Michael A. Laurenzano","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael A. Laurenzano","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002075773","display_name":"Scott Mahlke","orcid":"https://orcid.org/0000-0002-0438-0616"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Mahlke","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065128438","display_name":"Lingjia Tang","orcid":"https://orcid.org/0000-0002-5609-7775"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lingjia Tang","raw_affiliation_strings":["University of Michigan"],"affiliations":[{"raw_affiliation_string":"University of Michigan","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053236545","display_name":"Jason Mars","orcid":"https://orcid.org/0000-0002-7029-5292"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason Mars","raw_affiliation_strings":["University of Michigan, Ann Arbor, MI, US"],"affiliations":[{"raw_affiliation_string":"University of Michigan, Ann Arbor, MI, US","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5041306152"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":3.181713,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.93585754,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"13"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8968157768249512},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.8662136793136597},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.6459072828292847},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.6053286194801331},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5755996704101562},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5282615423202515},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.521672248840332},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.4995307922363281},{"id":"https://openalex.org/keywords/high-memory","display_name":"High memory","score":0.49483221769332886},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.46571019291877747},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4478038549423218},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4326988756656647},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.4215255677700043},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3803877830505371},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.13500618934631348},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.08434268832206726}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8968157768249512},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.8662136793136597},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.6459072828292847},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.6053286194801331},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5755996704101562},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5282615423202515},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.521672248840332},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.4995307922363281},{"id":"https://openalex.org/C2781357197","wikidata":"https://www.wikidata.org/wiki/Q5757597","display_name":"High memory","level":2,"score":0.49483221769332886},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.46571019291877747},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4478038549423218},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4326988756656647},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.4215255677700043},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3803877830505371},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.13500618934631348},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.08434268832206726},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2016.7783744","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2016.7783744","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320322581","display_name":"Vetenskapsr\u00e5det","ror":"https://ror.org/03zttf063"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":47,"referenced_works":["https://openalex.org/W1567646530","https://openalex.org/W1841592590","https://openalex.org/W1976919080","https://openalex.org/W2020517863","https://openalex.org/W2026005150","https://openalex.org/W2033982707","https://openalex.org/W2048588974","https://openalex.org/W2069738303","https://openalex.org/W2080592089","https://openalex.org/W2080794684","https://openalex.org/W2081368694","https://openalex.org/W2097243222","https://openalex.org/W2099517310","https://openalex.org/W2101756288","https://openalex.org/W2102449048","https://openalex.org/W2109884165","https://openalex.org/W2111444234","https://openalex.org/W2114508814","https://openalex.org/W2114703523","https://openalex.org/W2119299853","https://openalex.org/W2124608923","https://openalex.org/W2128120785","https://openalex.org/W2135393827","https://openalex.org/W2141955346","https://openalex.org/W2147657366","https://openalex.org/W2147657598","https://openalex.org/W2162752393","https://openalex.org/W2170382128","https://openalex.org/W2187230075","https://openalex.org/W2233797083","https://openalex.org/W2237415205","https://openalex.org/W2411972054","https://openalex.org/W2464177207","https://openalex.org/W2963674932","https://openalex.org/W4234461763","https://openalex.org/W4236934668","https://openalex.org/W4240237526","https://openalex.org/W4246535868","https://openalex.org/W4252874685","https://openalex.org/W6634196629","https://openalex.org/W6638632666","https://openalex.org/W6638783484","https://openalex.org/W6675692759","https://openalex.org/W6676088821","https://openalex.org/W6676366587","https://openalex.org/W6677192272","https://openalex.org/W6719768283"],"related_works":["https://openalex.org/W2735130281","https://openalex.org/W3010779417","https://openalex.org/W2993780376","https://openalex.org/W4236372686","https://openalex.org/W3094401657","https://openalex.org/W2567051523","https://openalex.org/W2976393426","https://openalex.org/W4390957266","https://openalex.org/W2142144850","https://openalex.org/W1964299322"],"abstract_inverted_index":{"Cache":[0],"capacity":[1],"and":[2,23,36,86,93,115,139,198,205],"memory":[3,68,91,146],"bandwidth":[4],"play":[5,142],"critical":[6],"roles":[7],"in":[8,66,75],"application":[9,95,166],"performance,":[10],"particularly":[11],"for":[12,49,164],"data-intensive":[13],"applications":[14,29,138],"from":[15,70],"domains":[16],"that":[17,60,155,171],"include":[18],"machine":[19],"learning,":[20],"numerical":[21],"analysis,":[22],"data":[24,65,74],"mining.":[25],"Many":[26],"of":[27,43,64,73,84,137],"these":[28,129],"are":[30,148],"also":[31],"tolerant":[32],"to":[33,79,101,110,124,127,178,208],"imprecise":[34],"inputs":[35],"have":[37],"loose":[38],"constraints":[39],"on":[40],"the":[41,62,67,71,76,82,90,111,125],"quality":[42],"output,":[44],"making":[45],"them":[46],"ideal":[47],"candidates":[48],"approximate":[50,57],"computing.":[51],"This":[52,97],"paper":[53],"introduces":[54],"a":[55,174,185,209],"novel":[56],"computing":[58],"technique":[59],"decouples":[61],"format":[63,72],"hierarchy":[69,92],"compute":[77],"subsystem":[78],"significantly":[80],"reduce":[81],"cost":[83],"storing":[85],"moving":[87],"bits":[88],"throughout":[89],"improve":[94],"performance.":[96,167],"asymmetric":[98],"compute-memory":[99],"extension":[100],"conventional":[102,210],"architectures,":[103],"ACME,":[104],"adds":[105],"two":[106],"new":[107],"instruction":[108],"classes":[109],"ISA":[112],"-":[113,117],"load-concise":[114],"store-concise":[116],"along":[118],"with":[119],"three":[120],"small":[121],"functional":[122],"units":[123],"micro-architecture":[126],"support":[128],"instructions.":[130],"ACME":[131,156,172],"does":[132],"not":[133],"affect":[134],"exact":[135],"execution":[136],"comes":[140],"into":[141],"only":[143],"when":[144],"concise":[145],"operations":[147],"used.":[149],"Through":[150],"detailed":[151],"experimentation":[152],"we":[153],"find":[154],"is":[157],"very":[158],"effective":[159],"at":[160],"trading":[161],"result":[162],"accuracy":[163],"improved":[165],"Our":[168],"results":[169],"show":[170],"achieves":[173],"1.3x":[175],"speedup":[176,187],"(up":[177],"1.8x)":[179],"while":[180,188],"maintaining":[181,189],"99%":[182],"accuracy,":[183],"or":[184],"1.1x":[186],"99.999%":[190],"accuracy.":[191],"Moreover,":[192],"our":[193],"approach":[194],"incurs":[195],"negligible":[196],"area":[197,204],"power":[199,207],"overheads,":[200],"adding":[201],"just":[202],"0.005%":[203],"0.1%":[206],"modern":[211],"architecture.":[212]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}