{"id":"https://openalex.org/W2130433275","doi":"https://doi.org/10.1109/micro.2008.4771798","title":"Online design bug detection: RTL analysis, flexible mechanisms, and evaluation","display_name":"Online design bug detection: RTL analysis, flexible mechanisms, and evaluation","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2130433275","doi":"https://doi.org/10.1109/micro.2008.4771798","mag":"2130433275"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2008.4771798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2008.4771798","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 41st IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025718736","display_name":"Kypros Constantinides","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kypros Constantinides","raw_affiliation_strings":["Advanced Computer Architecture Lab, University of Michigan, USA","[Advanced Computer Architecture Lab, University of Michigan, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Lab, University of Michigan, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"[Advanced Computer Architecture Lab, University of Michigan, USA]","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050695684","display_name":"Onur Mutlu","orcid":"https://orcid.org/0000-0002-0075-2312"},"institutions":[{"id":"https://openalex.org/I1290206253","display_name":"Microsoft (United States)","ror":"https://ror.org/00d0nc645","country_code":"US","type":"company","lineage":["https://openalex.org/I1290206253"]},{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Onur Mutlu","raw_affiliation_strings":["Microsoft Research and Carnegie, Mellon University, USA","Microsoft Research and Carnegie Mellon University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsoft Research and Carnegie, Mellon University, USA","institution_ids":["https://openalex.org/I74973139","https://openalex.org/I1290206253"]},{"raw_affiliation_string":"Microsoft Research and Carnegie Mellon University, USA","institution_ids":["https://openalex.org/I1290206253","https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113456715","display_name":"Todd Austin","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Todd Austin","raw_affiliation_strings":["Advanced Computer Architecture Lab, University of Michigan, USA","[Advanced Computer Architecture Lab, University of Michigan, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Lab, University of Michigan, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"[Advanced Computer Architecture Lab, University of Michigan, USA]","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.5252,"has_fulltext":false,"cited_by_count":62,"citation_normalized_percentile":{"value":0.96147163,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"282","last_page":"293"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.751621425151825},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.6030555367469788},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5529777407646179},{"id":"https://openalex.org/keywords/software-bug","display_name":"Software bug","score":0.450027734041214},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4327086806297302},{"id":"https://openalex.org/keywords/design-process","display_name":"Design process","score":0.4114300012588501},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.19962593913078308},{"id":"https://openalex.org/keywords/work-in-process","display_name":"Work in process","score":0.17265644669532776},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.15610137581825256},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14074689149856567}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.751621425151825},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.6030555367469788},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5529777407646179},{"id":"https://openalex.org/C1009929","wikidata":"https://www.wikidata.org/wiki/Q179550","display_name":"Software bug","level":3,"score":0.450027734041214},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4327086806297302},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.4114300012588501},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19962593913078308},{"id":"https://openalex.org/C174998907","wikidata":"https://www.wikidata.org/wiki/Q357662","display_name":"Work in process","level":2,"score":0.17265644669532776},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.15610137581825256},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14074689149856567},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/micro.2008.4771798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2008.4771798","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 41st IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.143.5343","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.143.5343","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eecs.umich.edu/~taustin/papers/MICRO41-bugdetect-final.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.204.6152","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.204.6152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.cmu.edu/%7Eomutlu/pub/hwbugs_micro08.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.5,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W117147670","https://openalex.org/W1804863837","https://openalex.org/W1903669731","https://openalex.org/W2113995939","https://openalex.org/W2119913792","https://openalex.org/W2149501383","https://openalex.org/W2156204788","https://openalex.org/W2156613948","https://openalex.org/W2157436839","https://openalex.org/W2162351670","https://openalex.org/W2163890539","https://openalex.org/W2170371518","https://openalex.org/W2178304631","https://openalex.org/W3216264835","https://openalex.org/W4246310005","https://openalex.org/W4250644124","https://openalex.org/W6604745190","https://openalex.org/W6677025205","https://openalex.org/W6683084215","https://openalex.org/W6828028390","https://openalex.org/W6832511200"],"related_works":["https://openalex.org/W2952348651","https://openalex.org/W2375742443","https://openalex.org/W2149381099","https://openalex.org/W4200520489","https://openalex.org/W1483190388","https://openalex.org/W2061536531","https://openalex.org/W193873054","https://openalex.org/W2153990583","https://openalex.org/W607296746","https://openalex.org/W184401258"],"abstract_inverted_index":{"Higher":[0],"level":[1,153],"of":[2,8,25,35,84,114,120,127,181,186,192,210,241,255],"resource":[3],"integration":[4],"and":[5,27,45,98,112,272],"the":[6,32,42,51,82,93,110,125,161,179,184,187,204,229,239,246,259,281],"addition":[7],"new":[9],"features":[10],"in":[11,50,100,203],"modern":[12,36],"multi-processors":[13],"put":[14],"a":[15,22,76,101,151,169,208,217,224],"significant":[16],"pressure":[17],"on":[18,160,258],"their":[19],"verification.":[20],"Although":[21],"large":[23],"amount":[24],"resources":[26],"time":[28],"are":[29],"devoted":[30],"to":[31,58,80,108,131,134,198,269,277],"verification":[33,43],"phase":[34],"processors,":[37],"many":[38],"design":[39,54,85,95,115,121,136,148,173,205,214,247],"bugs":[40,55,86,96,122,137,149,182],"escape":[41],"process":[44],"slip":[46],"into":[47,183],"processors":[48],"operating":[49],"field.":[52],"These":[53],"often":[56],"lead":[57],"lower":[59,62],"quality":[60],"products,":[61],"customer":[63],"satisfaction,":[64],"diminishing":[65],"brand/company":[66],"reputation,":[67],"or":[68],"even":[69],"expensive":[70],"product":[71],"recalls.":[72],"This":[73],"paper":[74],"proposes":[75],"flexible,":[77],"low-overhead":[78],"mechanism":[79,176,194,257],"detect":[81,135],"occurrence":[83],"during":[87],"on-line":[88],"operation.":[89],"First,":[90],"we":[91,167],"analyze":[92],"actual":[94],"found":[97,265],"fixed":[99],"commercial":[102],"chip-":[103],"multiprocessor,":[104],"Sun's":[105],"OpenSPARC":[106,260,283],"Tl,":[107],"understand":[109],"behavior":[111],"characteristics":[113],"bugs.":[116],"Our":[117],"RTL":[118,252],"analysis":[119],"shows":[123],"that":[124,129,146,177,244],"number":[126],"signals":[128,202,211,243],"need":[130],"be":[132,235,270,278],"monitored":[133],"is":[138,195,220,226,231],"significantly":[139],"larger":[140],"than":[141,207],"suggested":[142],"by":[143,237],"previous":[144],"studies":[145],"analyzed":[147],"at":[150,213],"higher":[152],"using":[154],"processor":[155,230],"errata":[156],"sheets.":[157],"Second,":[158],"based":[159],"insights":[162],"obtained":[163],"from":[164],"our":[165,193,256],"analyses,":[166],"propose":[168],"programmable,":[170],"distributed":[171],"online":[172],"bug":[174,225],"detection":[175],"incorporates":[178],"monitoring":[180,238],"flip-flops":[185],"design.":[188],"The":[189],"key":[190],"contribution":[191],"its":[196,266,273],"ability":[197],"monitor":[199],"all":[200],"control":[201,242],"rather":[206],"set":[209,240],"selected":[212],"time.":[215],"As":[216],"result,":[218],"it":[219,233],"very":[221],"flexible:":[222],"when":[223],"discovered":[227],"after":[228],"shipped,":[232],"can":[234],"detected":[236],"trigger":[245],"bug.":[248],"We":[249,264],"develop":[250],"an":[251],"prototype":[253],"implementation":[254],"Tl":[261,284],"chip":[262],"multiprocessor.":[263],"area":[267],"overhead":[268,276],"10%":[271],"power":[274],"consumption":[275],"3.5%":[279],"over":[280],"whole":[282],"chip.":[285]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":11},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":3}],"updated_date":"2026-06-17T08:01:34.144755","created_date":"2025-10-10T00:00:00"}
