{"id":"https://openalex.org/W2114626867","doi":"https://doi.org/10.1109/micro.2008.4771786","title":"The StageNet fabric for constructing resilient multicore systems","display_name":"The StageNet fabric for constructing resilient multicore systems","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2114626867","doi":"https://doi.org/10.1109/micro.2008.4771786","mag":"2114626867"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2008.4771786","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2008.4771786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 41st IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064330876","display_name":"Shantanu Gupta","orcid":"https://orcid.org/0000-0002-9931-1612"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shantanu Gupta","raw_affiliation_strings":["Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110112858","display_name":"Shuguang Feng","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shuguang Feng","raw_affiliation_strings":["Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049130587","display_name":"Amin Ansari","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amin Ansari","raw_affiliation_strings":["Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057956863","display_name":"Jason Blome","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jason Blome","raw_affiliation_strings":["Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002075773","display_name":"Scott Mahlke","orcid":"https://orcid.org/0000-0002-0438-0616"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Mahlke","raw_affiliation_strings":["Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, 48109 USA","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":11.5328,"has_fulltext":false,"cited_by_count":78,"citation_normalized_percentile":{"value":0.98825464,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"151"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7200111746788025},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6682327389717102},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6495662331581116},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5939602851867676},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5779841542243958},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.567011296749115},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5419614315032959},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.4687614142894745},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.37855130434036255},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34637224674224854},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.30535435676574707},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.2567429542541504},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.155422180891037},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11747825145721436}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7200111746788025},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6682327389717102},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6495662331581116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5939602851867676},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5779841542243958},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.567011296749115},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5419614315032959},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.4687614142894745},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.37855130434036255},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34637224674224854},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30535435676574707},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2567429542541504},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.155422180891037},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11747825145721436}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2008.4771786","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2008.4771786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 41st IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":56,"referenced_works":["https://openalex.org/W91368077","https://openalex.org/W111204614","https://openalex.org/W1561796284","https://openalex.org/W1579215414","https://openalex.org/W1596744596","https://openalex.org/W1975157752","https://openalex.org/W1991406672","https://openalex.org/W2008482633","https://openalex.org/W2017569223","https://openalex.org/W2022740893","https://openalex.org/W2032069904","https://openalex.org/W2062581063","https://openalex.org/W2097046051","https://openalex.org/W2097560795","https://openalex.org/W2097988171","https://openalex.org/W2098695358","https://openalex.org/W2112648765","https://openalex.org/W2114548296","https://openalex.org/W2116775565","https://openalex.org/W2117816012","https://openalex.org/W2121319784","https://openalex.org/W2122553095","https://openalex.org/W2125067970","https://openalex.org/W2125169487","https://openalex.org/W2125890858","https://openalex.org/W2128941141","https://openalex.org/W2129960401","https://openalex.org/W2134629288","https://openalex.org/W2135123845","https://openalex.org/W2144382742","https://openalex.org/W2151845324","https://openalex.org/W2157431560","https://openalex.org/W2157762234","https://openalex.org/W2158031022","https://openalex.org/W2159747318","https://openalex.org/W2163890539","https://openalex.org/W2164004001","https://openalex.org/W2165071510","https://openalex.org/W2166241631","https://openalex.org/W2167678606","https://openalex.org/W2170337384","https://openalex.org/W2172278174","https://openalex.org/W2275606101","https://openalex.org/W2889024928","https://openalex.org/W3148627525","https://openalex.org/W4231340621","https://openalex.org/W4231523873","https://openalex.org/W4233714602","https://openalex.org/W4241771809","https://openalex.org/W4242368470","https://openalex.org/W4248445118","https://openalex.org/W4249112804","https://openalex.org/W4254449752","https://openalex.org/W6635616599","https://openalex.org/W6677205684","https://openalex.org/W6991605720"],"related_works":["https://openalex.org/W2153096481","https://openalex.org/W2148616436","https://openalex.org/W2102525122","https://openalex.org/W4245282135","https://openalex.org/W4306316843","https://openalex.org/W1547865754","https://openalex.org/W2130594209","https://openalex.org/W2036953450","https://openalex.org/W4300955944","https://openalex.org/W2276000909"],"abstract_inverted_index":{"Scaling":[0],"of":[1,10,28,74,101,119,137,173,183,192],"CMOS":[2],"feature":[3],"size":[4],"has":[5,20,97],"long":[6],"been":[7,22,72,98],"a":[8,104,148,170,184,211],"source":[9],"dramatic":[11],"performance":[12,188],"gains.":[13],"However,":[14],"the":[15,85,99,117,135,180,190,198],"reduction":[16],"in":[17,84],"voltage":[18],"levels":[19],"not":[21],"able":[23],"to":[24,31,126,128,178,210],"match":[25],"this":[26,96,113,141,143],"rate":[27,131],"scaling,":[29],"leading":[30],"increasing":[32],"operating":[33],"temperatures":[34],"and":[35,66,88,133,146],"current":[36],"densities.":[37],"Given":[38],"that":[39,43,156,197],"most":[40],"wearout":[41],"mechanisms":[42],"plague":[44],"semiconductor":[45],"devices":[46],"are":[47,57,80],"highly":[48,149],"dependent":[49],"on":[50,169],"these":[51],"parameters,":[52],"significantly":[53],"higher":[54],"failure":[55,130],"rates":[56],"projected":[58],"for":[59,76,95],"future":[60],"technology":[61],"generations.":[62],"Consequently,":[63],"high":[64,129],"reliability":[65,160],"fault":[67],"tolerance,":[68],"which":[69],"have":[70],"traditionally":[71],"subjects":[73],"interest":[75],"high-end":[77],"server":[78],"markets,":[79],"now":[81],"getting":[82],"emphasis":[83],"mainstream":[86],"desktop":[87],"embedded":[89],"systems":[90],"space.":[91],"The":[92],"popular":[93],"solution":[94],"use":[100],"redundancy":[102,121],"at":[103],"coarse":[105],"granularity,":[106],"such":[107],"as":[108,161],"dual/triple":[109],"modular":[110],"redundancy.":[111],"In":[112],"work,":[114],"we":[115],"challenge":[116],"practice":[118],"coarse-granularity":[120],"by":[122],"identifying":[123],"its":[124,162],"inability":[125],"scale":[127],"scenarios":[132],"investigating":[134],"advantages":[136],"finer-grained":[138],"configurations.":[139],"To":[140],"end,":[142],"paper":[144],"presents":[145],"evaluates":[147],"reconfigurable":[150,171],"multicore":[151],"architecture,":[152],"named":[153],"StageNet":[154],"(SN),":[155],"is":[157],"designed":[158],"with":[159],"first":[163],"class":[164],"design":[165],"criteria.":[166],"SN":[167,200],"relies":[168],"network":[172],"replicated":[174],"processor":[175],"pipeline":[176],"stages":[177],"maximize":[179],"useful":[181],"lifetime":[182],"chip,":[185],"gracefully":[186],"degrading":[187],"towards":[189],"end":[191],"life.":[193],"Our":[194],"results":[195],"show":[196],"proposed":[199],"architecture":[201],"can":[202],"perform":[203],"nearly":[204],"50%":[205],"more":[206],"cumulative":[207],"work":[208],"compared":[209],"traditional":[212],"multicore.":[213]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":10}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
