{"id":"https://openalex.org/W4234103901","doi":"https://doi.org/10.1109/micro.2003.1253211","title":"Design and implementation of high-performance memory systems for future packet buffers","display_name":"Design and implementation of high-performance memory systems for future packet buffers","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W4234103901","doi":"https://doi.org/10.1109/micro.2003.1253211"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2003.1253211","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253211","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/2117/104301","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078371517","display_name":"J. Garcia","orcid":null},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J. Garcia","raw_affiliation_strings":["Computer Architecture Department, Polytechnic University of Catalonia, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Department, Polytechnic University of Catalonia, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041569465","display_name":"J. Corbal","orcid":null},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"J. Corbal","raw_affiliation_strings":["Computer Architecture Department, Polytechnic University of Catalonia, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Department, Polytechnic University of Catalonia, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048632856","display_name":"L. Cerda","orcid":null},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"L. Cerda","raw_affiliation_strings":["Computer Architecture Department, Polytechnic University of Catalonia, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Department, Polytechnic University of Catalonia, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020844763","display_name":"Mateo Valero","orcid":"https://orcid.org/0000-0003-2917-2482"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"M. Valero","raw_affiliation_strings":["Computer Architecture Department, Polytechnic University of Catalonia, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Department, Polytechnic University of Catalonia, Spain","institution_ids":["https://openalex.org/I9617848"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.2457,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.90441475,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"372","last_page":"384"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8054088354110718},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6772983074188232},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6590582728385925},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6088025569915771},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.6081639528274536},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.5427764058113098},{"id":"https://openalex.org/keywords/queue","display_name":"Queue","score":0.5313340425491333},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.48802557587623596},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.48062652349472046},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42808935046195984},{"id":"https://openalex.org/keywords/queueing-theory","display_name":"Queueing theory","score":0.4278934597969055},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35043397545814514},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.22349968552589417},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.21433886885643005},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.13945794105529785},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.121344655752182},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.11484593152999878}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8054088354110718},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6772983074188232},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6590582728385925},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6088025569915771},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.6081639528274536},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.5427764058113098},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.5313340425491333},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.48802557587623596},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.48062652349472046},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42808935046195984},{"id":"https://openalex.org/C22684755","wikidata":"https://www.wikidata.org/wiki/Q847526","display_name":"Queueing theory","level":2,"score":0.4278934597969055},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35043397545814514},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.22349968552589417},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.21433886885643005},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.13945794105529785},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.121344655752182},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.11484593152999878}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/micro.2003.1253211","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253211","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449)","raw_type":"proceedings-article"},{"id":"pmh:oai:upcommons.upc.edu:2117/104301","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/104301","pdf_url":null,"source":{"id":"https://openalex.org/S4377196262","display_name":"UPCommons institutional repository (Universitat Polit\u00e8cnica de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I9617848","host_organization_name":"Universitat Polit\u00e8cnica de Catalunya","host_organization_lineage":["https://openalex.org/I9617848"],"host_organization_lineage_names":[],"type":"repository"},"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:upcommons.upc.edu:2117/104301","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/104301","pdf_url":null,"source":{"id":"https://openalex.org/S4377196262","display_name":"UPCommons institutional repository (Universitat Polit\u00e8cnica de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I9617848","host_organization_name":"Universitat Polit\u00e8cnica de Catalunya","host_organization_lineage":["https://openalex.org/I9617848"],"host_organization_lineage_names":[],"type":"repository"},"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1513716704","https://openalex.org/W1532932247","https://openalex.org/W1920033171","https://openalex.org/W2104952512","https://openalex.org/W2129206751","https://openalex.org/W2138351227","https://openalex.org/W2139564164","https://openalex.org/W2144746678","https://openalex.org/W2146634722","https://openalex.org/W2155470191","https://openalex.org/W2166630981","https://openalex.org/W6630645911","https://openalex.org/W6684074904"],"related_works":["https://openalex.org/W2516517078","https://openalex.org/W1974599144","https://openalex.org/W2150909864","https://openalex.org/W4382618825","https://openalex.org/W2161286015","https://openalex.org/W4386903460","https://openalex.org/W4384572207","https://openalex.org/W2900372418","https://openalex.org/W2924367614","https://openalex.org/W4211178602"],"abstract_inverted_index":{"In":[0],"this":[1,233],"paper,":[2],"we":[3,117,132,165,208],"address":[4],"the":[5,44,102,121,127,135,151,161,176,187,212,220,224,229,236],"design":[6,52,70,104,197,230,239],"of":[7,41,87,99,202,226],"a":[8,32,77,111,191],"future":[9],"high-speed":[10,33],"router":[11,34,51],"that":[12,120,158,169],"supports":[13],"line":[14],"rates":[15],"as":[16,18],"high":[17,95],"OC-3072":[19],"(160":[20],"Gb/s),":[21],"around":[22],"one":[23,40],"hundred":[24],"ports":[25,90],"and":[26,61,91],"several":[27],"service":[28,92],"classes.":[29],"Building":[30],"such":[31],"would":[35],"raise":[36],"many":[37],"technological":[38],"problems,":[39],"them":[42],"being":[43],"packet":[45,68,205],"buffer":[46,69,206,238],"design,":[47],"mainly":[48],"because":[49],"in":[50,179,232],"it":[53],"is":[54,119,124,157,235],"important":[55],"to":[56,84,105,126,144,149,159,167,200,210,243,246],"provide":[57],"worst-case":[58,72,162],"bandwidth":[59,73,96,112,163],"guarantees":[60,74],"not":[62],"just":[63],"average-case":[64],"optimizations.":[65],"A":[66],"previous":[67,103],"provides":[71],"by":[75,140,185,218],"using":[76,190,240],"hybrid":[78],"SRAM/DRAM":[79],"approach.":[80],"Next-generation":[81],"routers":[82],"need":[83,166],"support":[85],"hundreds":[86,98],"interfaces":[88,100],"(i.e.,":[89],"classes).":[93],"Unfortunately,":[94],"for":[97],"requires":[101],"use":[106],"large":[107],"SRAMs":[108],"which":[109],"become":[110],"bottleneck.":[113],"The":[114,154],"key":[115,155],"observation":[116],"make":[118],"SRAM":[122,152],"size":[123],"proportional":[125],"DRAM":[128,137,188,213,242],"access":[129,138],"time":[130,139],"but":[131],"can":[133],"reduce":[134,150],"effective":[136],"overlapping":[141],"multiple":[142,216],"accesses":[143,177],"different":[145],"banks,":[146],"allowing":[147],"us":[148],"size.":[153],"challenge":[156],"keep":[160],"guarantees,":[164],"guarantee":[168,182],"there":[170],"are":[171,178],"no":[172],"bank":[173,183],"conflicts":[174,184],"while":[175],"flight.":[180],"We":[181],"reordering":[186],"requests":[189],"modern":[192],"issue-queue-like":[193],"mechanism.":[194],"Because":[195],"our":[196,227],"may":[198],"lead":[199],"fragmentation":[201],"memory":[203],"across":[204],"queues,":[207],"propose":[209],"share":[211],"space":[214],"among":[215],"queues":[217],"renaming":[219],"queue":[221],"slots.":[222],"To":[223],"best":[225],"knowledge,":[228],"proposed":[231],"paper":[234],"fastest":[237],"commodity":[241],"be":[244],"published":[245],"date.":[247]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}