{"id":"https://openalex.org/W4245279467","doi":"https://doi.org/10.1109/micro.2003.1253204","title":"Universal mechanisms for data-parallel architectures","display_name":"Universal mechanisms for data-parallel architectures","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W4245279467","doi":"https://doi.org/10.1109/micro.2003.1253204"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2003.1253204","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253204","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028943049","display_name":"Karthikeyan Sankaralingam","orcid":"https://orcid.org/0000-0002-8315-2389"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Karthikeyan Sankaralingam","raw_affiliation_strings":["University of Texas, Austin","Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas, Austin","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109844600","display_name":"S.W. Keckler","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.W. Keckler","raw_affiliation_strings":["University of Texas, Austin","Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas, Austin","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109394409","display_name":"William R. Mark","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"W.R. Mark","raw_affiliation_strings":["University of Texas, Austin","Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas, Austin","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067337700","display_name":"Doug Burger","orcid":"https://orcid.org/0009-0006-6588-6596"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Burger","raw_affiliation_strings":["University of Texas, Austin","Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas, Austin","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"Computer Architecture and Technology Laboratory, Department of Computer Sciences, University of Texas, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":1.1623,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.79167747,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"303","last_page":"314"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8626898527145386},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6439763307571411},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.5185880661010742},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5154019594192505},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4789043962955475},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4423426687717438},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4332287013530731},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.42395591735839844},{"id":"https://openalex.org/keywords/host","display_name":"Host (biology)","score":0.42355069518089294},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1291460394859314}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8626898527145386},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6439763307571411},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.5185880661010742},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5154019594192505},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4789043962955475},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4423426687717438},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4332287013530731},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.42395591735839844},{"id":"https://openalex.org/C126831891","wikidata":"https://www.wikidata.org/wiki/Q221673","display_name":"Host (biology)","level":2,"score":0.42355069518089294},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1291460394859314},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2003.1253204","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253204","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.47999998927116394,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306151","display_name":"Alfred P. Sloan Foundation","ror":"https://ror.org/052csg198"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W75340351","https://openalex.org/W1762563336","https://openalex.org/W2031209433","https://openalex.org/W2083790008","https://openalex.org/W2120585153","https://openalex.org/W2136826080","https://openalex.org/W2144481293","https://openalex.org/W2152687294","https://openalex.org/W2157373341","https://openalex.org/W2169706611","https://openalex.org/W2172212694","https://openalex.org/W2538506363","https://openalex.org/W2725179571","https://openalex.org/W2916411819","https://openalex.org/W3150534153","https://openalex.org/W4236485791","https://openalex.org/W4239988727","https://openalex.org/W4241990532","https://openalex.org/W4245217677","https://openalex.org/W4245348408","https://openalex.org/W4247008581","https://openalex.org/W4255632552","https://openalex.org/W6603042646","https://openalex.org/W6678014108","https://openalex.org/W6728885212","https://openalex.org/W6813607791","https://openalex.org/W6813828836","https://openalex.org/W6822293924","https://openalex.org/W6828640377"],"related_works":["https://openalex.org/W122453572","https://openalex.org/W2466405623","https://openalex.org/W2151122729","https://openalex.org/W2351011383","https://openalex.org/W2146879484","https://openalex.org/W4221002079","https://openalex.org/W1757458251","https://openalex.org/W2141090099","https://openalex.org/W2045325972","https://openalex.org/W1980898636"],"abstract_inverted_index":{"Data-parallel":[0],"programs":[1,58,71],"are":[2],"both":[3],"growing":[4],"in":[5,9,12,90],"importance":[6],"and":[7,32,63,80,98,150,196],"increasing":[8],"diversity,":[10],"resulting":[11],"specialized":[13,200],"processors":[14],"targeted":[15],"at":[16],"specific":[17],"classes":[18],"of":[19,56,69,101,104,111,119,135,147,176,188],"these":[20,70],"programs.":[21],"This":[22],"paper":[23,115],"presents":[24],"a":[25,44,117,125,136,145,168],"classification":[26],"scheme":[27],"for":[28,42],"data-parallel":[29,57,148],"program":[30],"attributes,":[31,113],"proposes":[33,116],"micro-architectural":[34,121],"mechanisms":[35,122,140],"to":[36,128,132,154,161,179],"support":[37],"applications":[38],"with":[39],"diverse":[40,155],"behavior":[41],"using":[43,167],"single":[45],"reconfigurable":[46],"architecture.":[47],"We":[48],"focus":[49],"on":[50,108],"the":[51,91,99,133,174,177,180],"following":[52],"four":[53],"broad":[54],"kinds":[55],"-":[59],"DSP/multimedia,":[60],"scientific,":[61],"networking,":[62],"real-time":[64],"graphics":[65],"workloads.":[66],"While":[67],"all":[68],"exhibit":[72],"high":[73],"computational":[74],"intensity,":[75],"coarse-grain":[76],"regular":[77,82],"control":[78,96],"behavior,":[79,85,97],"some":[81],"memory":[83,105],"access":[84],"they":[86],"show":[87,172],"wide":[88],"variance":[89],"computation":[92],"requirements,":[93],"fine":[94],"grain":[95],"frequency":[100],"other":[102],"types":[103],"accesses.":[106],"Based":[107],"this":[109,114],"study":[110],"application":[112,149,181],"set":[118],"general":[120],"that":[123,173],"enable":[124],"baseline":[126,169],"architecture":[127,178],"be":[129,152],"dynamically":[130],"tailored":[131],"demands":[134,182],"particular":[137],"application.":[138],"These":[139],"provide":[141],"efficient":[142],"execution":[143],"across":[144],"spectrum":[146],"can":[151],"applied":[153],"architectures":[156],"ranging":[157],"from":[158],"vector":[159],"cores":[160],"conventional":[162],"superscalar":[163],"cores.":[164],"Our":[165],"results":[166],"TRIPS":[170],"processor":[171],"configurability":[175],"provides":[183],"harmonic":[184],"mean":[185],"performance":[186],"improvement":[187],"5%-55%":[189],"over":[190],"scalable":[191],"yet":[192],"less":[193],"flexible":[194],"architectures,":[195],"performs":[197],"competitively":[198],"against":[199],"architectures.":[201]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
