{"id":"https://openalex.org/W4237273530","doi":"https://doi.org/10.1109/micro.2003.1253202","title":"Macro-op scheduling: relaxing scheduling loop constraints","display_name":"Macro-op scheduling: relaxing scheduling loop constraints","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W4237273530","doi":"https://doi.org/10.1109/micro.2003.1253202"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2003.1253202","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253202","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038330046","display_name":"I. Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"I. Kim","raw_affiliation_strings":["University of Wisconsin","Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Wisconsin","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052869119","display_name":"Mikko H. Lipasti","orcid":"https://orcid.org/0000-0002-8535-9244"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Lipasti","raw_affiliation_strings":["University of Wisconsin","Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Wisconsin","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":null,"apc_paid":null,"fwci":9.7131,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.98649409,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"277","last_page":"288"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10551","display_name":"Scheduling and Optimization Algorithms","score":0.9793000221252441,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10551","display_name":"Scheduling and Optimization Algorithms","score":0.9793000221252441,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9682999849319458,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12782","display_name":"Assembly Line Balancing Optimization","score":0.9287999868392944,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8138172626495361},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.5728725790977478},{"id":"https://openalex.org/keywords/fair-share-scheduling","display_name":"Fair-share scheduling","score":0.5598026514053345},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5480622053146362},{"id":"https://openalex.org/keywords/round-robin-scheduling","display_name":"Round-robin scheduling","score":0.5357341766357422},{"id":"https://openalex.org/keywords/rate-monotonic-scheduling","display_name":"Rate-monotonic scheduling","score":0.5110936760902405},{"id":"https://openalex.org/keywords/two-level-scheduling","display_name":"Two-level scheduling","score":0.5034460425376892},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4880184233188629},{"id":"https://openalex.org/keywords/earliest-deadline-first-scheduling","display_name":"Earliest deadline first scheduling","score":0.4656124413013458},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.4574403762817383},{"id":"https://openalex.org/keywords/fixed-priority-pre-emptive-scheduling","display_name":"Fixed-priority pre-emptive scheduling","score":0.4335865378379822},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3691738247871399},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3294747471809387},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.19504833221435547},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.11319676041603088},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.08765560388565063},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06754279136657715},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.06728032231330872}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8138172626495361},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.5728725790977478},{"id":"https://openalex.org/C31689143","wikidata":"https://www.wikidata.org/wiki/Q733809","display_name":"Fair-share scheduling","level":3,"score":0.5598026514053345},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5480622053146362},{"id":"https://openalex.org/C175893541","wikidata":"https://www.wikidata.org/wiki/Q1196582","display_name":"Round-robin scheduling","level":4,"score":0.5357341766357422},{"id":"https://openalex.org/C127456818","wikidata":"https://www.wikidata.org/wiki/Q238879","display_name":"Rate-monotonic scheduling","level":4,"score":0.5110936760902405},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.5034460425376892},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4880184233188629},{"id":"https://openalex.org/C32310161","wikidata":"https://www.wikidata.org/wiki/Q666365","display_name":"Earliest deadline first scheduling","level":5,"score":0.4656124413013458},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.4574403762817383},{"id":"https://openalex.org/C122141398","wikidata":"https://www.wikidata.org/wiki/Q5456330","display_name":"Fixed-priority pre-emptive scheduling","level":5,"score":0.4335865378379822},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3691738247871399},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3294747471809387},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19504833221435547},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.11319676041603088},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.08765560388565063},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06754279136657715},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.06728032231330872}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2003.1253202","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253202","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W63944998","https://openalex.org/W1965288623","https://openalex.org/W1965562075","https://openalex.org/W1990518515","https://openalex.org/W2032094184","https://openalex.org/W2039631685","https://openalex.org/W2101536355","https://openalex.org/W2121539621","https://openalex.org/W2129760904","https://openalex.org/W2140782438","https://openalex.org/W2164376452","https://openalex.org/W4230658192","https://openalex.org/W4232645751","https://openalex.org/W4240643561","https://openalex.org/W4242771098","https://openalex.org/W4243665729","https://openalex.org/W4249929199","https://openalex.org/W4250273581","https://openalex.org/W4252245672","https://openalex.org/W4253421865","https://openalex.org/W6602613798","https://openalex.org/W6641405865","https://openalex.org/W6680931953","https://openalex.org/W6684386307"],"related_works":["https://openalex.org/W2184166483","https://openalex.org/W1545991362","https://openalex.org/W4300092030","https://openalex.org/W2167574351","https://openalex.org/W3184267879","https://openalex.org/W1935185185","https://openalex.org/W2545511463","https://openalex.org/W2404383452","https://openalex.org/W2372008037","https://openalex.org/W2978148977"],"abstract_inverted_index":{"Ensuring":[0],"back-to-back":[1],"execution":[2],"of":[3,54,66,101,111],"dependent":[4],"instructions":[5,19,34,84,118],"in":[6,56],"a":[7,121],"conventional":[8],"out-of-order":[9],"processor":[10],"requires":[11],"scheduling":[12,41,67,80,100,105,113,132,140],"logic":[13,42,68],"that":[14,128],"wakes":[15],"up":[16],"and":[17,96],"selects":[18],"at":[20],"the":[21,44,52,58,89,108,112],"same":[22,45],"rate":[23],"as":[24],"they":[25],"are":[26],"executed.":[27],"To":[28],"sustain":[29],"high":[30],"performance,":[31],"integer":[32],"ALU":[33],"typically":[35],"have":[36,50],"single-cycle":[37,46,86],"latency,":[38],"consequently":[39],"requiring":[40],"with":[43,85],"latency.":[47],"Prior":[48],"proposals":[49,143],"advocated":[51],"use":[53],"speculation":[55],"either":[57],"wakeup":[59],"or":[60,135,141],"select":[61],"phases":[62],"to":[63,69,119],"enable":[64],"pipelining":[65],"achieve":[70],"higher":[71],"clock":[72],"frequency.":[73],"In":[74],"contrast,":[75],"this":[76],"paper":[77],"proposes":[78],"macro-op":[79,131],"which":[81],"systematically":[82],"removes":[83],"latency":[87],"from":[88],"machine":[90],"by":[91,115],"combining":[92],"them":[93],"into":[94],"macro-ops,":[95],"performs":[97,133],"nonspeculative":[98],"pipelined":[99,129],"multi-cycle":[102],"operations.":[103],"Macro-op":[104],"also":[106],"increases":[107],"effective":[109],"size":[110],"window":[114],"enabling":[116],"multiple":[117],"occupy":[120],"single":[122],"issue":[123],"queue":[124],"entry.":[125],"We":[126],"demonstrate":[127],"2-cycle":[130],"comparably":[134],"even":[136],"better":[137],"than":[138],"atomic":[139],"prior":[142],"for":[144],"select-free":[145],"scheduling.":[146]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
