{"id":"https://openalex.org/W4231114788","doi":"https://doi.org/10.1109/micro.2003.1253187","title":"Power-driven design of router microarchitectures in on-chip networks","display_name":"Power-driven design of router microarchitectures in on-chip networks","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W4231114788","doi":"https://doi.org/10.1109/micro.2003.1253187"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2003.1253187","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253187","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084314896","display_name":"Hangsheng Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hangsheng Wang","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057413185","display_name":"Li-Shiuan Peh","orcid":"https://orcid.org/0000-0001-9010-6519"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Li-Shiuan Peh","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085975362","display_name":"Sharad Malik","orcid":"https://orcid.org/0000-0002-0837-5443"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Malik","raw_affiliation_strings":["Department of Electrical Engineering, Princeton University, Princeton, NJ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Princeton University, Princeton, NJ, USA","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":101,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"105","last_page":"116"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.755929172039032},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.7439279556274414},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7244579195976257},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6274651288986206},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6234596967697144},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.6080048084259033},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.56806880235672},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5503702163696289},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.482128381729126},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.47285082936286926},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45116356015205383},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4325340688228607},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.43172013759613037},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34563958644866943},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.337216317653656},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17458653450012207}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.755929172039032},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.7439279556274414},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7244579195976257},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6274651288986206},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6234596967697144},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.6080048084259033},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.56806880235672},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5503702163696289},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.482128381729126},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.47285082936286926},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45116356015205383},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4325340688228607},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.43172013759613037},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34563958644866943},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.337216317653656},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17458653450012207},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/micro.2003.1253187","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253187","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd Digital Avionics Systems Conference. Proceedings (Cat. No.03CH37449)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.3.1395","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.3.1395","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.microarch.org/micro36/html/./pdf/wang-PowerDrivenDesign.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.3.1580","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.3.1580","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.princeton.edu/~peh/publications/power_net.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320310620","display_name":"University of Texas at Austin","ror":"https://ror.org/00hj54h04"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1573851380","https://openalex.org/W1984520032","https://openalex.org/W2020346881","https://openalex.org/W2044831861","https://openalex.org/W2062684659","https://openalex.org/W2108783911","https://openalex.org/W2109259551","https://openalex.org/W2111531437","https://openalex.org/W2123184444","https://openalex.org/W2126495708","https://openalex.org/W2140064132","https://openalex.org/W2143342758","https://openalex.org/W2151888078","https://openalex.org/W2154628372","https://openalex.org/W2155062435","https://openalex.org/W2165021839","https://openalex.org/W2165072326","https://openalex.org/W2171248969","https://openalex.org/W2172212694","https://openalex.org/W2916411819","https://openalex.org/W3148484433","https://openalex.org/W4235990555","https://openalex.org/W4238386974","https://openalex.org/W6634283092","https://openalex.org/W6675224354","https://openalex.org/W6681109464","https://openalex.org/W6793277613"],"related_works":["https://openalex.org/W3198758847","https://openalex.org/W4230458348","https://openalex.org/W2063558432","https://openalex.org/W4309225346","https://openalex.org/W2674375159","https://openalex.org/W2541426356","https://openalex.org/W4238741899","https://openalex.org/W2545358750","https://openalex.org/W2109681980","https://openalex.org/W4231114788"],"abstract_inverted_index":{"As":[0],"demand":[1],"for":[2,23],"bandwidth":[3],"increases":[4],"in":[5,36,125,136,143],"systems-on-a-chip":[6],"and":[7,15,91,97,139],"chip":[8,119],"multiprocessors,":[9],"networks":[10,33,49],"are":[11,50,111],"fast":[12],"replacing":[13],"buses":[14],"dedicated":[16],"wires":[17],"as":[18,115,117],"the":[19,69,99],"pervasive":[20],"interconnect":[21],"fabric":[22],"on-chip":[24,32,48,59],"communication.":[25],"The":[26],"tight":[27],"delay":[28],"requirements":[29],"faced":[30],"by":[31],"have":[34],"resulted":[35],"prior":[37],"microarchitectures":[38,61],"being":[39],"largely":[40],"performance-driven.":[41],"While":[42],"performance":[43],"is":[44],"a":[45,63,123],"critical":[46],"metric,":[47],"also":[51,95],"extremely":[52],"power-constrained.":[53],"In":[54],"this":[55],"paper,":[56],"we":[57],"investigate":[58],"network":[60,74,85,105,126,137],"from":[62],"power-driven":[64],"perspective.":[65],"We":[66,94],"first":[67],"analyze":[68],"power":[70,100,127],"dissipation":[71],"of":[72,103,128],"existing":[73,104],"microarchitectures,":[75],"highlighting":[76],"insights":[77],"that":[78],"prompt":[79],"us":[80],"to":[81,130],"devise":[82],"several":[83],"power-efficient":[84],"microarchitectures:":[86],"segmented":[87],"crossbar,":[88],"cut-through":[89],"crossbar":[90],"write-through":[92],"buffer.":[93],"study":[96],"uncover":[98],"saving":[101],"potential":[102],"architecture:":[106],"express":[107],"cube.":[108],"These":[109],"techniques":[110],"evaluated":[112],"with":[113,133],"synthetic":[114],"well":[116],"real":[118],"multiprocessor":[120],"traces,":[121],"showing":[122],"reduction":[124],"up":[129],"44.9%,":[131],"along":[132],"no":[134],"degradation":[135],"performance,":[138],"even":[140],"improved":[141],"latency-throughput":[142],"some":[144],"cases.":[145]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":6}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}