{"id":"https://openalex.org/W4254708132","doi":"https://doi.org/10.1109/micro.2003.1253178","title":"Microarchitecture on the MOSFET diet","display_name":"Microarchitecture on the MOSFET diet","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W4254708132","doi":"https://doi.org/10.1109/micro.2003.1253178"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2003.1253178","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253178","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067956231","display_name":"K. Bernstein","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"K. Bernstein","raw_affiliation_strings":["IBM Thomas J. Watson Research Center","IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5067956231"],"corresponding_institution_ids":["https://openalex.org/I4210114115"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"3","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.8924614191055298},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6907705664634705},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5952368378639221},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5621696710586548},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.5299609303474426},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4910311698913574},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4686158299446106},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4185038208961487},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.3958227336406708},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3792418837547302},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3628874123096466},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.31354355812072754},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2643498182296753},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23332777619361877},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11918720602989197}],"concepts":[{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.8924614191055298},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6907705664634705},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5952368378639221},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5621696710586548},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5299609303474426},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4910311698913574},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4686158299446106},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4185038208961487},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3958227336406708},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3792418837547302},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3628874123096466},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.31354355812072754},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2643498182296753},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23332777619361877},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11918720602989197},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2003.1253178","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2003.1253178","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W39373273","https://openalex.org/W2005635288","https://openalex.org/W1592982659","https://openalex.org/W2098026815","https://openalex.org/W2390545901","https://openalex.org/W2351709090","https://openalex.org/W2138574009","https://openalex.org/W2735012529","https://openalex.org/W2145535077","https://openalex.org/W2106119416"],"abstract_inverted_index":{"Microarchitecture":[0],"and":[1,72,96,104,124],"technology":[2],"scaling":[3],"have":[4,51,91],"historically":[5],"shared":[6],"responsibility":[7],"for":[8,106],"the":[9,98,125,132],"microprocessor's":[10],"phenomenal":[11],"generation-over-generation":[12],"performance":[13,139],"improvement.":[14],"The":[15,58],"era":[16],"marked":[17],"by":[18],"unrestrained":[19],"proliferation":[20],"of":[21,88,100,127,134],"successively":[22],"scaled,":[23],"leakier":[24],"devices":[25,103],"to":[26,35,69,121],"achieve":[27],"incremental":[28],"architectural":[29],"transaction":[30],"rate":[31],"growth":[32],"is":[33,140],"coming":[34],"a":[36],"close,":[37],"however.":[38],"Increased":[39],"pipeline":[40],"depth":[41],"has":[42,79],"caused":[43],"non-linear":[44],"latch":[45],"density":[46],"expansion;":[47],"shorter":[48],"FO4-equivalent":[49],"cycles":[50],"made":[52],"control":[53],"logic":[54,66],"substantially":[55],"more":[56,141],"complex.":[57],"resulting":[59],"energy":[60],"per":[61],"operation,":[62],"scaled-process-induced":[63],"delay":[64],"variation,":[65],"corruption":[67],"due":[68],"soft":[70],"errors,":[71],"erosion":[73],"in":[74,136],"die":[75],"area":[76],"access":[77],"latency":[78],"become":[80],"real-world":[81],"constraints.":[82],"This":[83],"talk":[84],"explores":[85],"how":[86,97],"features":[87],"past":[89],"technologies":[90],"influenced":[92],"high":[93],"speed":[94],"microarchitectures,":[95],"characteristics":[99],"proposed":[101],"new":[102],"interconnects":[105],"lithographies":[107],"beyond":[108],"90":[109],"nm":[110],"may":[111],"shape":[112],"future":[113],"machine":[114],"design.":[115],"Given":[116],"our":[117],"industry's":[118],"power-restricted":[119],"ability":[120],"continue":[122],"scaling,":[123],"approach":[126],"fundamental,":[128],"quantum-mechanical":[129],"precision":[130],"boundaries,":[131],"role":[133],"microarchitecture":[135],"extending":[137],"CMOS":[138],"important":[142],"than":[143],"ever.":[144]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-28T07:46:37.118299","created_date":"2025-10-10T00:00:00"}
