{"id":"https://openalex.org/W4248627918","doi":"https://doi.org/10.1109/micro.2002.1176265","title":"Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors","display_name":"Register write specialization register read specialization: a path to complexity-effective wide-issue superscalar processors","publication_year":2003,"publication_date":"2003-06-26","ids":{"openalex":"https://openalex.org/W4248627918","doi":"https://doi.org/10.1109/micro.2002.1176265"},"language":"en","primary_location":{"id":"doi:10.1109/micro.2002.1176265","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2002.1176265","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075222745","display_name":"Andr\u00e9 Seznec","orcid":"https://orcid.org/0000-0002-3058-6503"},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]},{"id":"https://openalex.org/I4210133778","display_name":"Centre Inria de l'Universit\u00e9 de Rennes","ror":"https://ror.org/04040yw90","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1326498283","https://openalex.org/I4210133778"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"A. Seznec","raw_affiliation_strings":["IRISA/INRIA, Rennes, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IRISA/INRIA, Rennes, France","institution_ids":["https://openalex.org/I1326498283","https://openalex.org/I2802519937","https://openalex.org/I4210133778"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065515163","display_name":"\u00c9. Toullec","orcid":null},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]},{"id":"https://openalex.org/I4210133778","display_name":"Centre Inria de l'Universit\u00e9 de Rennes","ror":"https://ror.org/04040yw90","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1326498283","https://openalex.org/I4210133778"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"E. Toullec","raw_affiliation_strings":["IRISA/INRIA, Rennes, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IRISA/INRIA, Rennes, France","institution_ids":["https://openalex.org/I1326498283","https://openalex.org/I2802519937","https://openalex.org/I4210133778"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028576648","display_name":"Olivier Rochecouste","orcid":null},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]},{"id":"https://openalex.org/I4210133778","display_name":"Centre Inria de l'Universit\u00e9 de Rennes","ror":"https://ror.org/04040yw90","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1326498283","https://openalex.org/I4210133778"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"O. Rochecouste","raw_affiliation_strings":["IRISA/INRIA, Rennes, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IRISA/INRIA, Rennes, France","institution_ids":["https://openalex.org/I1326498283","https://openalex.org/I2802519937","https://openalex.org/I4210133778"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"383","last_page":"394"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.9594842791557312},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8262842893600464},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46811503171920776},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.4453759491443634},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.41619497537612915},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3378799855709076},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.3229222595691681},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28962790966033936},{"id":"https://openalex.org/keywords/memory-address","display_name":"Memory address","score":0.14854925870895386}],"concepts":[{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.9594842791557312},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8262842893600464},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46811503171920776},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.4453759491443634},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.41619497537612915},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3378799855709076},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.3229222595691681},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28962790966033936},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.14854925870895386},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/micro.2002.1176265","is_oa":false,"landing_page_url":"https://doi.org/10.1109/micro.2002.1176265","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1549478457","https://openalex.org/W2089363288","https://openalex.org/W2105555051","https://openalex.org/W2123170006","https://openalex.org/W2138351227","https://openalex.org/W2140782438","https://openalex.org/W2150073849","https://openalex.org/W2154433299","https://openalex.org/W2155470578","https://openalex.org/W2161864047","https://openalex.org/W2164376452","https://openalex.org/W4236892585","https://openalex.org/W4240643561","https://openalex.org/W4242220430","https://openalex.org/W4244330651","https://openalex.org/W4245804582","https://openalex.org/W4251468890","https://openalex.org/W4298376790","https://openalex.org/W6632851541","https://openalex.org/W6680931953"],"related_works":["https://openalex.org/W2103008217","https://openalex.org/W2009783759","https://openalex.org/W3002622661","https://openalex.org/W2776017533","https://openalex.org/W2982642548","https://openalex.org/W1537419803","https://openalex.org/W3116750762","https://openalex.org/W4245282684","https://openalex.org/W2058198174","https://openalex.org/W37150954"],"abstract_inverted_index":{"With":[0,213],"the":[1,23,32,47,70,74,139,145,159,162,166,170,194,206,210,219,222,232,258,264,310,326,329],"continuous":[2],"shrinking":[3],"of":[4,49,72,129,138,147,169,196,221,257,319,331],"transistor":[5],"size,":[6],"processor":[7],"designers":[8],"are":[9,229,244,300],"facing":[10],"new":[11],"difficulties":[12,45],"to":[13,78,99,110,132,179,231,263,272,315],"achieve":[14],"high":[15],"clock":[16],"frequency.":[17],"The":[18],"register":[19,90,96,141,171,202,266,303],"file":[20,91,172,267],"read":[21,111,197,283],"time,":[22,161],"wake":[24],"up":[25],"and":[26,31,112,165,203,209,226,281],"selection":[27],"logic":[28,208,224],"traversal":[29],"delay":[30,36],"bypass":[33,211,227],"network":[34],"transit":[35],"with":[37,184,235,328],"also":[38],"their":[39],"respective":[40],"power":[41,163,275],"consumptions":[42],"constitute":[43],"major":[44],"for":[46,188,302,312],"design":[48,71],"wide":[50],"issue":[51,239],"superscalar":[52,75,102,190,337],"processors.":[53,191],"In":[54],"this":[55],"paper,":[56],"we":[57,120,177],"show":[58],"that":[59,63],"transgressing":[60],"a":[61,87,94,214,236,254,269,295,320,332],"rule,":[62],"has":[64],"so":[65],"far":[66],"been":[67],"applied":[68],"in":[69,135,246],"all":[73,101],"processors,":[76],"allows":[77,253],"reduce":[79],"these":[80],"difficulties.":[81],"Currently":[82],"used":[83],"general-purpose":[84,107],"ISAs":[85],"feature":[86],"single":[88],"logical":[89],"(and":[92],"generally":[93],"floating-point":[95],"file).":[97],"Up":[98],"now":[100],"processors":[103],"have":[104],"allowed":[105],"any":[106,114],"functional":[108,130],"unit":[109],"write":[113,133,148],"physical":[115,140,242,265],"general":[116],"purpose":[117],"register.":[118,153],"First,":[119],"propose":[121,178],"Register":[122,154,181,185],"Write":[123,155,182],"Specialization,":[124],"i.e,":[125],"forcing":[126],"distinct":[127,136],"groups":[128],"units":[131],"only":[134],"subsets":[137],"file,":[142],"thus":[143],"limiting":[144],"number":[146,195],"ports":[149,198],"on":[150,199,309],"each":[151,200],"individual":[152,201],"Specialization":[156,183,187],"significantly":[157],"reduces":[158],"access":[160,284],"consumption":[164,276],"silicon":[167,260],"area":[168,261],"without":[173],"impairing":[174],"performance.":[175],"Second,":[176],"combine":[180],"Read":[186],"clustered":[189],"This":[192],"limits":[193],"simplifies":[204],"both":[205],"wakeup":[207],"network.":[212],"8-way":[215,321,334],"4-cluster":[216,322,335],"WSRS":[217,247,251,305,323],"architecture,":[218],"complexities":[220],"wake-up":[223],"entry":[225],"point":[228],"equivalent":[230],"ones":[233],"found":[234],"conventional":[237,333,336],"4-way":[238],"processor.":[240,338],"More":[241],"registers":[243],"needed":[245,301],"architectures.":[248],"Nevertheless,":[249],"using":[250],"architecture":[252,306,324],"dramatic":[255],"reduction":[256],"total":[259],"devoted":[262],"(by":[268],"factor":[270],"four":[271],"six).":[273],"Its":[274],"is":[277,286],"more":[278],"than":[279],"halved":[280],"its":[282],"time":[285],"shortened":[287],"by":[288],"one":[289,330],"third.":[290],"Some":[291],"extra":[292,297],"hardware":[293],"and/or":[294],"few":[296],"pipeline":[298],"stages":[299],"renaming.":[304],"induces":[307],"constraints":[308],"policy":[311],"allocating":[313],"instructions":[314],"clusters.":[316],"However,":[317],"performance":[318],"stands":[325],"comparison":[327]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}