{"id":"https://openalex.org/W2158062770","doi":"https://doi.org/10.1109/memcod.2010.5558652","title":"FPGA-based combined architecture for stream categorization and intrusion detection","display_name":"FPGA-based combined architecture for stream categorization and intrusion detection","publication_year":2010,"publication_date":"2010-07-01","ids":{"openalex":"https://openalex.org/W2158062770","doi":"https://doi.org/10.1109/memcod.2010.5558652","mag":"2158062770"},"language":"en","primary_location":{"id":"doi:10.1109/memcod.2010.5558652","is_oa":false,"landing_page_url":"https://doi.org/10.1109/memcod.2010.5558652","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012408072","display_name":"Sunil Shukla","orcid":"https://orcid.org/0000-0002-9268-4096"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sunil Shukla","raw_affiliation_strings":["IBM Research, IBM Thomas J. Watson Research Center, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research, IBM Thomas J. Watson Research Center, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001159571","display_name":"Rodric Rabbah","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rodric Rabbah","raw_affiliation_strings":["IBM Research, IBM Thomas J. Watson Research Center, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research, IBM Thomas J. Watson Research Center, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062770961","display_name":"M. Vorbach","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Martin Vorbach","raw_affiliation_strings":["PACT XPP Technologies AG, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"PACT XPP Technologies AG, Munich, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7591,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.75195167,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"6 1","issue":null,"first_page":"77","last_page":"80"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.89637291431427},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.773510217666626},{"id":"https://openalex.org/keywords/contest","display_name":"CONTEST","score":0.6852603554725647},{"id":"https://openalex.org/keywords/categorization","display_name":"Categorization","score":0.644737720489502},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5528488159179688},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5444066524505615},{"id":"https://openalex.org/keywords/intrusion-detection-system","display_name":"Intrusion detection system","score":0.5278387069702148},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47239989042282104},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.41925549507141113},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3557576537132263},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.22376644611358643}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.89637291431427},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.773510217666626},{"id":"https://openalex.org/C2777582232","wikidata":"https://www.wikidata.org/wiki/Q5013414","display_name":"CONTEST","level":2,"score":0.6852603554725647},{"id":"https://openalex.org/C94124525","wikidata":"https://www.wikidata.org/wiki/Q912550","display_name":"Categorization","level":2,"score":0.644737720489502},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5528488159179688},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5444066524505615},{"id":"https://openalex.org/C35525427","wikidata":"https://www.wikidata.org/wiki/Q745881","display_name":"Intrusion detection system","level":2,"score":0.5278387069702148},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47239989042282104},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.41925549507141113},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3557576537132263},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.22376644611358643},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/memcod.2010.5558652","is_oa":false,"landing_page_url":"https://doi.org/10.1109/memcod.2010.5558652","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Eighth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2010)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.550000011920929,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1772887859","https://openalex.org/W2054625910","https://openalex.org/W2107723643","https://openalex.org/W2120575424","https://openalex.org/W4255459514","https://openalex.org/W6638172817"],"related_works":["https://openalex.org/W2946214509","https://openalex.org/W2606108738","https://openalex.org/W4286740636","https://openalex.org/W2628063975","https://openalex.org/W2356479129","https://openalex.org/W2387346515","https://openalex.org/W2352196451","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"This":[0],"paper":[1,17],"presents":[2],"a":[3,26],"working":[4],"solution":[5,30],"for":[6,35],"the":[7,21,37,44],"MEMOCODE":[8],"2010":[9],"design":[10,13],"contest.":[11],"The":[12,29],"presented":[14],"in":[15,20],"this":[16],"is":[18],"implemented":[19],"Xilinx":[22],"V5LX330":[23],"FPGA":[24],"as":[25],"custom":[27],"circuit.":[28],"implements":[31],"pattern":[32],"matching":[33],"logic":[34],"all":[36],"mandatory":[38],"and":[39],"optional":[40],"patterns":[41],"while":[42],"maintaining":[43],"required":[45],"line":[46],"rate":[47],"of":[48],"500":[49],"Mbps.":[50]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}