{"id":"https://openalex.org/W2136066426","doi":"https://doi.org/10.1109/memcod.2005.1487895","title":"System design extreme makeover","display_name":"System design extreme makeover","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2136066426","doi":"https://doi.org/10.1109/memcod.2005.1487895","mag":"2136066426"},"language":"en","primary_location":{"id":"doi:10.1109/memcod.2005.1487895","is_oa":false,"landing_page_url":"https://doi.org/10.1109/memcod.2005.1487895","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2005. MEMOCODE '05.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025797692","display_name":"Daniel D. Gajski","orcid":null},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"D.D. Gajski","raw_affiliation_strings":["Center for Embedded Computer Systems, University of California, Irvine, USA","Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Center for Embedded Computer Systems, University of California, Irvine, USA","institution_ids":["https://openalex.org/I204250578"]},{"raw_affiliation_string":"Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA#TAB#","institution_ids":["https://openalex.org/I204250578"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5025797692"],"corresponding_institution_ids":["https://openalex.org/I204250578"],"apc_list":null,"apc_paid":null,"fwci":0.5156,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.69238946,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"71","last_page":"76"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9878000020980835,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7517711520195007},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.741762638092041},{"id":"https://openalex.org/keywords/semantics","display_name":"Semantics (computer science)","score":0.6493743062019348},{"id":"https://openalex.org/keywords/bridge","display_name":"Bridge (graph theory)","score":0.4825812876224518},{"id":"https://openalex.org/keywords/software-design","display_name":"Software design","score":0.46602723002433777},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.45781010389328003},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45097818970680237},{"id":"https://openalex.org/keywords/design-language","display_name":"Design language","score":0.4387868344783783},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.4375388026237488},{"id":"https://openalex.org/keywords/design-process","display_name":"Design process","score":0.43537139892578125},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.39647382497787476},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28218501806259155},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.2603375315666199},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13655847311019897},{"id":"https://openalex.org/keywords/work-in-process","display_name":"Work in process","score":0.12605956196784973}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7517711520195007},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.741762638092041},{"id":"https://openalex.org/C184337299","wikidata":"https://www.wikidata.org/wiki/Q1437428","display_name":"Semantics (computer science)","level":2,"score":0.6493743062019348},{"id":"https://openalex.org/C100776233","wikidata":"https://www.wikidata.org/wiki/Q2532492","display_name":"Bridge (graph theory)","level":2,"score":0.4825812876224518},{"id":"https://openalex.org/C52913732","wikidata":"https://www.wikidata.org/wiki/Q857102","display_name":"Software design","level":4,"score":0.46602723002433777},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.45781010389328003},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45097818970680237},{"id":"https://openalex.org/C49777639","wikidata":"https://www.wikidata.org/wiki/Q5264354","display_name":"Design language","level":2,"score":0.4387868344783783},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.4375388026237488},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.43537139892578125},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.39647382497787476},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28218501806259155},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.2603375315666199},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13655847311019897},{"id":"https://openalex.org/C174998907","wikidata":"https://www.wikidata.org/wiki/Q357662","display_name":"Work in process","level":2,"score":0.12605956196784973},{"id":"https://openalex.org/C126322002","wikidata":"https://www.wikidata.org/wiki/Q11180","display_name":"Internal medicine","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/memcod.2005.1487895","is_oa":false,"landing_page_url":"https://doi.org/10.1109/memcod.2005.1487895","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2005. MEMOCODE '05.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5199999809265137,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2010065153","https://openalex.org/W2748581502","https://openalex.org/W3186603776","https://openalex.org/W2505568333","https://openalex.org/W2381555396","https://openalex.org/W90400707","https://openalex.org/W2027242272","https://openalex.org/W1998689446","https://openalex.org/W3194490326","https://openalex.org/W1800986026"],"abstract_inverted_index":{"With":[0],"complexities":[1,22],"of":[2],"systems-on-chip":[3],"(SOCs)":[4],"rising":[5],"almost":[6],"daily,":[7],"the":[8,36,44,89],"design":[9,38,62,80,85,102],"community":[10],"has":[11],"been":[12],"searching":[13],"for":[14,35],"a":[15,33,61],"new":[16],"methodology":[17],"that":[18,64],"can":[19,83],"handle":[20],"given":[21],"with":[23,106],"increased":[24],"productivity":[25],"and":[26,49,52,73,120],"decreased":[27],"time-to-market.":[28],"In":[29,75],"order":[30,76],"to":[31,55,71,77,100],"find":[32],"solution":[34],"system-level":[37],"flow,":[39],"we":[40,82],"must":[41],"look":[42],"at":[43],"system":[45],"gap":[46,58],"between":[47],"SW":[48],"HW":[50],"designs":[51],"then":[53],"try":[54],"bridge":[56],"this":[57,79],"by":[59,87],"developing":[60],"flow":[63,81],"is":[65],"based":[66],"on":[67],"common":[68],"principles":[69],"applicable":[70],"software":[72],"hardware.":[74],"achieve":[78],"define":[84,101],"process":[86],"using":[88],"concepts":[90],"found":[91],"in":[92,96],"standard":[93],"algebras":[94],"which,":[95],"turn,":[97],"allows":[98,113],"us":[99],"models":[103],"more":[104],"formally":[105],"clean":[107,111],"unambiguous":[108],"semantics.":[109],"Such":[110],"semantics":[112],"automatic":[114],"model":[115],"generation,":[116],"simplifies":[117],"synthesis":[118],"algorithms":[119],"verification":[121],"techniques.":[122]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
