{"id":"https://openalex.org/W2735383393","doi":"https://doi.org/10.1109/meco.2017.7977167","title":"High-level test data generation for software-based self-test in microprocessors","display_name":"High-level test data generation for software-based self-test in microprocessors","publication_year":2017,"publication_date":"2017-06-01","ids":{"openalex":"https://openalex.org/W2735383393","doi":"https://doi.org/10.1109/meco.2017.7977167","mag":"2735383393"},"language":"en","primary_location":{"id":"doi:10.1109/meco.2017.7977167","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2017.7977167","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 6th Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065172476","display_name":"Adeboye Stephen Oyeniran","orcid":"https://orcid.org/0000-0002-6344-3875"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Adeboye Stephen Oyeniran","raw_affiliation_strings":["Tallinn University of Technology, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079607448","display_name":"Artjom Jasnetski","orcid":null},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Artjom Jasnetski","raw_affiliation_strings":["Tallinn University of Technology, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045334611","display_name":"Anton T\u0161ertov","orcid":"https://orcid.org/0000-0003-4084-7313"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Anton Tsertov","raw_affiliation_strings":["Tallinn University of Technology, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010536057","display_name":"Raimund Ubar","orcid":"https://orcid.org/0000-0001-8186-4385"},"institutions":[{"id":"https://openalex.org/I111112146","display_name":"Tallinn University of Technology","ror":"https://ror.org/0443cwa12","country_code":"EE","type":"education","lineage":["https://openalex.org/I111112146"]}],"countries":["EE"],"is_corresponding":false,"raw_author_name":"Raimund Ubar","raw_affiliation_strings":["Tallinn University of Technology, Tallinn, Estonia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tallinn University of Technology, Tallinn, Estonia","institution_ids":["https://openalex.org/I111112146"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I111112146"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.777900218963623},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.7095514535903931},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6454329490661621},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.47601112723350525},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.46041399240493774},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45117276906967163},{"id":"https://openalex.org/keywords/test-data","display_name":"Test data","score":0.4476185142993927},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.43316733837127686},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4183049201965332},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.41266119480133057},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.34809935092926025},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3329692482948303},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3249056935310364},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.321855366230011},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2116294503211975},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08777397871017456}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.777900218963623},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.7095514535903931},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6454329490661621},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.47601112723350525},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.46041399240493774},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45117276906967163},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.4476185142993927},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.43316733837127686},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4183049201965332},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.41266119480133057},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34809935092926025},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3329692482948303},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3249056935310364},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.321855366230011},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2116294503211975},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08777397871017456},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/meco.2017.7977167","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2017.7977167","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 6th Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1823755974","https://openalex.org/W1876406499","https://openalex.org/W1905213452","https://openalex.org/W1965015817","https://openalex.org/W1971122637","https://openalex.org/W2071841318","https://openalex.org/W2098076619","https://openalex.org/W2105522986","https://openalex.org/W2115386046","https://openalex.org/W2115795793","https://openalex.org/W2152040677","https://openalex.org/W2154237597","https://openalex.org/W2154711067","https://openalex.org/W2156278309","https://openalex.org/W2170296906","https://openalex.org/W2411718005","https://openalex.org/W2533852066","https://openalex.org/W4233176001","https://openalex.org/W6676844478","https://openalex.org/W6677178894","https://openalex.org/W6682680733"],"related_works":["https://openalex.org/W2091833418","https://openalex.org/W2913077774","https://openalex.org/W4256030018","https://openalex.org/W2145089576","https://openalex.org/W2021253405","https://openalex.org/W1986228509","https://openalex.org/W2154529098","https://openalex.org/W2535245920","https://openalex.org/W2109319621","https://openalex.org/W2147058777"],"abstract_inverted_index":{"A":[0,32],"new":[1,90],"high-level":[2,34,78],"fault":[3,45,96],"model":[4,20,46],"and":[5,17,36,80],"test":[6,39,62],"generation":[7,41,63],"method":[8,35,64],"for":[9,38,49],"software-based":[10],"self-test":[11],"in":[12],"microprocessors":[13],"(MP)":[14],"is":[15,21,65,84,98],"proposed":[16,48,75],"investigated.":[18],"The":[19,73,86],"derived":[22],"directly":[23],"from":[24],"the":[25,29,50,56,89],"instruction":[26],"set":[27],"of":[28,53,59,88],"given":[30],"MP.":[31,54],"deterministic":[33],"algorithm":[37],"data":[40,57],"based":[42],"on":[43],"this":[44],"are":[47,76],"control":[51],"part":[52],"For":[55],"path":[58],"MP,":[60],"pseudo-exhaustive":[61],"proposed,":[66],"which":[67],"provides":[68],"high":[69,94],"gate-level":[70,82,95],"SAF":[71,102],"coverage.":[72],"methods":[74],"fully":[77],"approaches,":[79],"no":[81],"ATPG":[83],"needed.":[85],"capability":[87],"approach":[91],"to":[92],"achieving":[93],"coverage":[97],"demonstrated":[99],"by":[100],"low-level":[101],"simulation.":[103]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
